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equests from threads <strong>to</strong> per<strong>for</strong>m scheduling,<br />

message passing, resource allocation, and<br />

many other services. In most instances, services<br />

must be per<strong>for</strong>med quickly, so the thread<br />

can complete its assigned processing be<strong>for</strong>e<br />

the occurrence of the next interrupt. While not<br />

a part of interrupt processing, the <strong>system</strong> service<br />

is a critical real-time response that can<br />

make or break a <strong>system</strong>, and includes:<br />

● scheduling a task or thread <strong>to</strong> run upon the<br />

occurrence of some future event,<br />

● passing a message from one thread <strong>to</strong><br />

another,<br />

● claiming a resource from a common pool,<br />

Even more variable than interrupt processing,<br />

the implementation of <strong>system</strong> services is<br />

equally critical in achieving good real-time per<strong>for</strong>mance<br />

in an RTOS. Together with interrupt<br />

processing, <strong>system</strong> services combine <strong>to</strong> <strong>for</strong>m<br />

the most significant processing that an RTOS<br />

is asked <strong>to</strong> per<strong>for</strong>m. Different implementations<br />

will approach these functions differently, with<br />

different architectures <strong>to</strong> produce a wide<br />

range of per<strong>for</strong>mance.<br />

Why is per<strong>for</strong>mance so critical?<br />

The time required <strong>for</strong> completion of these<br />

functions is particularly critical in real-time<br />

<strong>system</strong>s, which must be deterministic, and<br />

also must respond rapidly or suffer loss of data<br />

or even fundamental malfunction of the <strong>system</strong>.<br />

An example might be a flight-control <strong>system</strong><br />

that must respond <strong>to</strong> a pilot input in time<br />

<strong>to</strong> avoid a stall, or a disk-drive controller that<br />

must s<strong>to</strong>p the drive’s read head at precisely the<br />

point at which data is <strong>to</strong> be read or written.<br />

Rapid-fire interrupts from high-speed data<br />

packet arrival in<strong>to</strong> a DSL router also must be<br />

handled promptly <strong>to</strong> avoid triggering a retry<br />

because one was missed.<br />

Processor speed is critical in executing all of<br />

the RTOS instructions required <strong>to</strong> per<strong>for</strong>m the<br />

desired function, but brute <strong>for</strong>ce alone cannot<br />

satisfy <strong>system</strong> demands, nor can it provide the<br />

most economical or efficient solution. A 2GHz<br />

processor might breeze through code in satisfac<strong>to</strong>ry<br />

time, but it could be <strong>to</strong>o costly, draw <strong>to</strong>o<br />

much power, or present physical packaging<br />

challenges. A more economical processor, running<br />

an efficient RTOS, might do just as well in<br />

per<strong>for</strong>mance, or even better, yet cost far less<br />

and not pose power/heat/packaging problems.<br />

Focusing on the most significant elements<br />

allows real-time per<strong>for</strong>mance <strong>to</strong> be measured<br />

in a rigorous fashion. Comparing how well<br />

multiple RTOSes on a common hardware plat<strong>for</strong>m<br />

per<strong>for</strong>m specific critical functions (see<br />

table 1) lets developers quantify real-time per<strong>for</strong>mance<br />

and make the best decision <strong>for</strong> their<br />

application. <br />

www.expresslogic.com<br />

Table 1: Example timings<br />

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Reference plat<strong>for</strong>m: ARM9 processor, 40MHz. RTOS: ThreadX<br />

Times generally scale linearly with clock rate <strong>for</strong> most 32-bit processors<br />

System Service IR TS TR TRCS<br />

tx_thread_suspend 2.8µS 4.2µS<br />

tx_thread_resume 2.6µS 5.3µS<br />

tx_thread_relinquish 1.2µS 3.4µS<br />

tx_queue_send 2.1µS 5.1µS 4.3µS 6.8µS<br />

tx_queue_receive 1.7µS 4.9µS 4.8µS 7.6µS<br />

tx_semaphore_get 0.8µS 4.8µS<br />

tx_semaphore_put 0.9µS 3.2µS 5.8µS<br />

tx_mutex_get 1.1µS 5.3µS<br />

tx_mutex_put 2.4µS 4.4µS 7.0µS<br />

tx_event_flags_set 1.4µS 4.1µS 6.7µS<br />

tx_event_flags_get 1.2µS 5.2µS<br />

tx_block_allocate 1.0µS 4.9µS<br />

tx_block_release 1.0µS 3.4µS 6.0µS<br />

tx_byte_allocate 3.3µS 6.2µS<br />

tx_byte_release 1.9µS 6.9µS 9.5µS<br />

Context Switch 1.9µS<br />

Interrupt Latency 0µS – 1.8µS<br />

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35

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