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z/VM: CP Commands and Utilities Reference - z/VM - IBM

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TRACE: Comm<strong>and</strong> Responses<br />

TRACE: Comm<strong>and</strong> Responses<br />

Purpose<br />

In this section are illustrated the comm<strong>and</strong> responses for each of the TRACE<br />

comm<strong>and</strong> oper<strong>and</strong>s. These response descriptions use the following symbols:<br />

Symbol Meaning<br />

aaaaaaaa<br />

aaaaaaaaaaaaaaaa<br />

aaaaaaaa_aaaaaaaa<br />

A storage address, followed by a single quote (’) if a primary<br />

address space storage address or a double quote (”) if a home<br />

address space storage address. For external <strong>and</strong> I/O interrupts, it is<br />

the PSW address at the time of the interrupt. When a PER event is<br />

reflected to the virtual machine, it is the program event recorder<br />

event address. For other program exceptions, it is the old PSW<br />

instruction address for nullification exceptions, <strong>and</strong> for all others it is<br />

the old PSW instruction address as adjusted by the instruction<br />

length code. 1<br />

tttttttt<br />

tttttttt_tttttttt<br />

tttttttttttttttt<br />

A transfer address, followed by a single quote (’) if DAT. 2<br />

xxxxxxxx An instruction, CSW status, <strong>and</strong> other such items.<br />

gggggggg A second-level channel comm<strong>and</strong> word, CSW status, <strong>and</strong> other<br />

guest output.<br />

hhhhhhhh A first-level channel comm<strong>and</strong> word, CSW status, <strong>and</strong> other such<br />

host output.<br />

oooo A first-level CCW offset.<br />

address1 The address of oper<strong>and</strong> 1 (for SI <strong>and</strong> SS formats only). 2<br />

address2 The address of oper<strong>and</strong> 2 (for RX, RS, S, <strong>and</strong> SS formats only). 2<br />

The oper<strong>and</strong>s address1 <strong>and</strong> address2 may be question marks if:<br />

v the address cannot be resolved because the base or index<br />

registers used to compute them have been altered by the<br />

instruction<br />

v the oper<strong>and</strong> is ignored by the instruction.<br />

address3/address4/address5<br />

Addresses of storage alterations. 2<br />

content1 The contents of the R1 field (RRE format only). 1<br />

content2 The contents of the R2 field (RRE format only). 1<br />

vvvv A virtual device number.<br />

vsch A virtual subchannel number.<br />

1. The number of hexadecimal digits displayed depends on the virtual machine mode: eight for ESA/390-mode <strong>and</strong> ESA/XC-mode<br />

machines; 16 for z/Architecture-mode machines. If SET UNDERSCORE is set on, the 16 digits are separated in the middle with an<br />

underscore for easier readablility.<br />

2. The number of hexadecimal digits displayed depends on the guest addressing mode: eight for 24-bit or 32-bit addressing mode; 16<br />

for 64-bit addressing mode.<br />

1610 z/<strong>VM</strong>: <strong>CP</strong> <strong>Comm<strong>and</strong>s</strong> <strong>and</strong> <strong>Utilities</strong> <strong>Reference</strong>

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