2.Digital Design with CPLD Applications _ VHDL - Dueck

40 CHAPTER 2 • Logic Functions and Gates
As previously stated, any AND- or OR-shaped gate can be represented in its DeMorgan
equivalent form. All we need to do is analyze a gate for its shape, input, and output,
then change everything.
❘❙❚ EXAMPLE 2.3
Analyze the gate in Figure 2.25 and write a Boolean expression, descriptive sentence, and
truth table for the gate. Mark active output levels on the truth table with asterisks. Find the
DeMorgan equivalent form of the gate and write its Boolean expression and description.
FIGURE 2.25
Example 2.3: Logic Gates
A
B
C
Y
SOLUTION
Boolean expression: Y A B C
Shape: OR (at least one)
Input: LOW
Output: LOW
Descriptive sentence: Output Y is LOW if A OR B OR C is LOW.
Truth table:
Table 2.14 Truth Table
of Gate in Figure 2.25
A B C Y
0 0 0 0*
0 0 1 0*
0 1 0 0*
0 1 1 0*
1 0 0 0*
1 0 1 0*
1 1 0 0*
1 1 1 1
Figure 2.26 shows the DeMorgan equivalent form of the gate in Figure 2.25. To create
this symbol, we change the shape from OR to AND and invert the logic levels at both input
and output.
FIGURE 2.26
Example 2.3: DeMorgan
Equivalent of Gate in
Figure 2.25
C BA
Y
Boolean expression: Y ABC
Descriptive sentence: Output Y is HIGH if A AND B AND C are HIGH.
❘❙❚
❘❙❚ SECTION 2.4 REVIEW PROBLEM
2.8 The output of a gate is described by the following Boolean expression:
Y A B C D
Write the Boolean expression for the DeMorgan equivalent form of this gate.