Acer Emachines E627 COMPAL LA-5481P HCWG0_H0 Rev1.0

5
4
3
2
1
+1.2V_HT
+VDDCLK_IO
L30
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
1
1
FBMA-L11-201209-221LMA30T_0805
C260
C142
C298
C293
C280
C135
2
2
2
2
2
2
22U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C263
2
+3VS
+3VS_CLK
L31
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
1
FBMA-L11-201209-221LMA30T_0805
C367
C138
C278
C404
C295
22U_0805_6.3V6M
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
C274
C160
C140
C268
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C294
2
0.1U_0402_16V4Z
1
C297
1U_0402_6.3V4Z
2
D
+3VS_CLK
L36
1 2
+3VS_CLKVDDA
1U CLOSE PIN 69
D
+3VS_CLK
FBMA-L11-201209-221LMA30T_0805
22U_0805_6.3V6M
1
C161
2
1
2
C141
0.1U_0402_16V4Z
49
48
U15
VDDA
GNDA
ICS 9LPRS488
SMBCLK 1
SMBDAT
2
SB_CK_SCLK <10,11,18,31>
SB_CK_SDAT <10,11,18,31>
C
1 2
R112
8.2K_0402_5%
@
R182
8.2K_0402_5%
1 2
1 2
1 2
R187
@
8.2K_0402_5%
SEL_SATA
SEL_HT66
R188
@
8.2K_0402_5%
LAN request <25> LAN_CLKREQ#
MiniCard1 request <31> MINI1_CLKREQ#
R495 8.2K_0402_5%
1 2
+3VS_CLK
+3VS_CLK
R490 8.2K_0402_5%
1 2
C277 2 1
0.1U_0402_16V4Z
+VDDCLK_IO
+3VS_CLK
+3VS
L35
1 2
FBM-L11-160808-800LMT_0603
1 2
C282
@
2.2U_0603_6.3V4Z
1 2
C281
0.1U_0402_16V4Z
62
66
12
18
28
37
53
3
17
29
38
44
54
61
69
24
51
50
43
42
VDDREF
GNDREF
VDDSRC_IO
VDDSRC_IO
VDDATIG_IO
VDDSB_SRC_IO
VDDCPU_IO
VDDDOT
VDDSRC
VDDATIG
VDDSB_SRC
VDDSATA
VDDCPU
VDDHTT
VDD48
CLKREQ0 #
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#
SB_SRC_SLOW#
41
CPUKG0T_LPRS 56
CPUKG0C_LPRS 55
HTT0T_LPRS / 66 M 60
HTT0C_LPRS / 66 M 59
SB_SRC0T_LPRS 40
SB_SRC0C_LPRS 39
SB_SRC1T_LPRS 35
SB_SRC1C_LPRS 34
ATIG0T_LPRS 33
ATIG0C_LPRS 32
ATIG1T_LPRS 31
ATIG1C_LPRS 30
ATIG2T_LPRS 26
ATIG2C_LPRS 25
SRC0T_LPRS 23
SRC0C_LPRS 22
SRC_SLOW
CLK_CPU
CLK_CPU#
CLK_HTT
CLK_HTT#
CLK_ATIG0
CLK_ATIG0#
CLK_SRC0
CLK_SRC0#
1 2
R170 1 2
47.5_0402_1%
R168
47.5_0402_1%
1 2
R175 1 2
0_0402_5%
R172
0_0402_5%
1 2
R174 1 2
0_0402_5%
R176
0_0402_5%
1 2
R189 1 2
0_0402_5%
R190
0_0402_5%
1 2
R169
261_0402_1%
CLK_NBHT <13>
CLK_NBHT# <13>
CLK_NBGFX <13>
CLK_NBGFX# <13>
CLK_PCIE_LAN <25>
CLK_PCIE_LAN# <25>
CLK_CPU_BCLK <8>
CLK_CPU_BCLK# <8>
NB HTT
NB GFX
LAN
CPU
SRC_SLOW
+3VS_CLK
@
1 2 1
2
R161
8.2K_0402_5%
R111
8.2K_0402_5%
C
B
External 14MHz CLK
for SB710
CLK_XTAL_OUT
<17> CLK_14M_SB
R109
33_0402_5%
1 2
SEL_SATA
<13> CLK_NB_14.318M
1 2 SEL_HT66
R179
158_0402_1%
1 2
R178
90.9_0402_1%
<27> CLK_48M_SD
2 1 CLK_48M_0
R194
33_0402_5%
<18> CLK_48M_USB
2 1 CLK_48M_1
R193
33_0402_5%
CLK_XTAL_IN
CLK_XTAL_OUT
63
64
65
71
70
67
68
REF2/SEL_27
REF1/SEL_SATA
REF0/SEL_HTT66
48MHz_0
48MHz_1
X1
X2
SRC1T_LPRS 21
SRC1C_LPRS 20
SRC2T_LPRS 16
SRC2C_LPRS 15
SRC3T_LPRS 14
SRC3C_LPRS 13
SRC4T_LPRS 10
SRC4C_LPRS 9
SRC5T_LPRS 8
SRC5C_LPRS 7
CLK_SRC2
CLK_SRC2#
CLK_SRC4
CLK_SRC4#
1 2
R197 1 2
0_0402_5%
R196
0_0402_5%
1 2
R200 1 2
0_0402_5%
R199
0_0402_5%
CLK_PCIE_MINI1 <31>
CLK_PCIE_MINI1# <31>
CLK_SBLINK_BCLK <13>
CLK_SBLINK_BCLK# <13>
MiniCard
NB A LINK
SRC 0
SRC 1
SRC 2
SRC 3
SRC 4
LAN
MINI1 (WLAN)
NEW CARD
NB-Alink
B
CLK_XTAL_IN
Y4
2 1 FUJICOM
14.31818MHZ_20P_6X1430004201
1
1
C290
C288
33P_0402_50V8J
33P_0402_50V8J
2
2
6
GNDDOT
11
GNDSRC
19
GNDSRC
27
GNDATIG
36
GNDSB_SRC
47
GNDSATA
52
GNDCPU
58
GNDHTT
72
GND48
73
GNDPAD
SRC7T_LPRS/27MHz_SS 5
SRC7C_LPRS/27MHz_NS 4
ICS9LPRS488AKLFT_MLF72_10x10
SRC6T/SATAT_LPRS 46
SRC6C/SATAC_LPRS 45
Main--SLG8SP626VTR-SA00001Z310
Second--ICS9LPRS488CKLFT-SA000023H10
PD#
57
@
CLK_SRC6
CLK_SRC6#
2 1
R173
8.2K_0402_5%
1
C299
1U_0402_6.3V4Z
2
1 2
R163 1 2
0_0402_5%
R164
0_0402_5%
+3VS_CLK
CLK_SBSRC_BCLK <17>
CLK_SBSRC_BCLK# <17>
SB RCLK
HT_REFCLKP
SRC 5
SRC 6
SB-Alink
NB CLOCK INPUT TABLE
NB CLOCKS RS740 RX780 RS780
HT_REFCLKN
REFCLK_P
REFCLK_N
GFX_REFCLK
66M SE(SINGLE END) 100M DIFF
NC
100M DIFF
100M DIFF
100M DIFF
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
NC NC vref
100M DIFF
100M DIFF
100M DIFF(IN/OUT)*
A
GPP_REFCLK
NC
100M DIFF
GPPSB_REFCLK 100M DIFF
100M DIFF 100M DIFF
NC
A
1 configure as single-ended 66MHz output
SEL_27M 1 configure as 27M and 27M_SS output
SEL_HTT66
No used
0* configure as differential 100MHz output
0 configure as SRC_7 output
1* SS 100M SATA SRC6 output
SEL_SATA
0 SS 100M SATA SRC6 output
* default
WWW.AliSaler.Com
5
4
Security Classification
Compal Secret Data
Issued Date
2005/03/08 Deciphered Date
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom
401743
C
Date: Wednesday, June 24, 2009
Sheet 16 of
47
3
2
1
Compal Electronics, Inc.
SCHEMATIC, MB A5481