Display Standard - Veritas et Visus

Veritas et Visus Display Standard February 2009
demodulator segments will likely lead the ecosystems consolidation in terms of both M&A and insolvencies across
’09 and ’10. Yet these same sub-categories that are poised for over-supply are also fostering some of the greatest
architectural innovations within today’s HDTV architecture: the ability to unlock a global, universal system
semiconductor solution.
Today there are only a handful of semiconductor suppliers that have created or assembled all of the necessary
intellectual property (IP) blocks to provide tomorrow’s “true” single die ASIC. The tension that exists between
analog and digital, image quality
variation, single carrier and
multi carrier, and process
geometries is too great to make
this economically feasible today.
Yet, as innovative, specialized
suppliers develop IP that
captures the attention of large,
system OEMs, the larger
semiconductor companies will
acquire and integrate the IP
directly into their existing
portfolios. As an example, based
on the FPGA demonstrations and
roadmaps being shared at the
leading display OEMs, it is
believed that a combined silicon
tuner solution (e.g. tuner +
demodulator) will provide
Figure 2: HDTV sub-component value vs. company sub-component focus
acceptable multi-carrier, multi-region capabilities before 2010 year-end. This could enable the offering to be
combined within one of the leading MPEG or image processor IP portfolios by way of a multi-chip-module (MCM)
in 2010 followed by a single-die scheme on or before 2011.
Regardless of the exact timing, the economic climate is forcing numerous semiconductor companies to take bold
risks in terms of both architectural innovation and IP licensing. Many companies both small and large are working
tirelessly to invent, and if successful, their inventions will fuel the inevitable consolidation and long-term
architectural maturity of HDTV. In the interim, HDTV display manufacturers have a large number of silicon
suppliers ranging from experienced through novice to consider for inclusion on their test benches when finalizing
their 2009 designs.
1
“Chipmakers on the Edge,” by Bruce Einhorn
2
“The New Economics of Semiconductor Manufacturing,” by Clayton M. Christensen, Steven King, Matt Verlinden,
and Woodward Yang
3
Display Insights: The average HDTV semiconductor BOM was calculated using the weighted average of the four leading subarchitectures
and 90+ semiconductor companies defined and tracked by Display Insights. This technique takes into account
the volume difference between the respective sub-architectures as well as the BOM differences among 1080i/1080p and
MPEG2/MPEG4 designs.
4
DisplaySearch: Monthly Global TV E-Tail Pricing & Specification Database. Note: The price decrease was lower than
expected, as DisplaySearch recently included India in its global research, which has higher TV prices due to the region’s high
consumption tax. January 26, 2009 press release data combined with Display Insights internal forecast.
5
Display Insights: Semiconductor content per LCD TV set includes the summation of manufacturer pricing across the following
components: integrated tuner, demodulator, MPEG processor, image processor, interconnects and system memory. In many
cases these functions were integrated into a shared SOC versus multiple discreet ICs. For more information, please see
Display Insights’ new report: Innovation, Partnership and Death: The New Economics of HDTV Semiconductors.
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