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322<br />

AM, FM, and Digital Modulated Systems Chap. 5<br />

Compared with an AM signal, the percentage of modulation on a DSB-SC signal is infinite,<br />

because there is no carrier line component. Furthermore, the modulation efficiency of a DSB-SC<br />

signal is 100%, since no power is wasted in a discrete carrier. However, a product detector (which<br />

is more expensive than an envelope detector) is required for demodulation of the DSB-SC signal.<br />

If transmitting circuitry restricts the modulated signal to a certain peak value, say, A p , it can be<br />

demonstrated (see Prob. 5–11) that the sideband power of a DSB-SC signal is four times that of a<br />

comparable AM signal with the same peak level. In this sense, the DSB-SC signal has a fourfold<br />

power advantage over that of an AM signal.<br />

If m(t) is a polar binary data signal (instead of an audio signal), then Eq. (5–13) is a<br />

BPSK signal, first described in Example 2–22. Details of BPSK signaling will be covered in<br />

Sec. 5–9. As shown in Table 4–1, a QM signal can be generated by adding two DSB signals<br />

where there are two signals, m 1 (t) and m 2 (t), modulating cosine and sine carriers, respectively.<br />

5–4 COSTAS LOOP AND SQUARING LOOP<br />

The coherent reference for product detection of DSB-SC cannot be obtained by the use of<br />

an ordinary phase-locked tracking loop, because there are no spectral line components at<br />

; f c . However, since the DSB-SC signal has a spectrum that is symmetrical with respect to<br />

the (suppressed) carrier frequency, either one of the two types of carrier recovery loops<br />

shown in Fig. 5–3 may be used to demodulate the DSB-SC signal. Figure 5–3a shows the<br />

Costas PLL and Fig. 5–3b shows the squaring loop. The noise performances of these two<br />

loops are equivalent [Ziemer and Peterson, 1985], so the choice of which loop to implement<br />

depends on the relative cost of the loop components and the accuracy that can be realized<br />

when each is built.<br />

As shown in Fig. 5–3a, the Costas PLL is analyzed by assuming that the VCO is locked<br />

to the input suppressed carrier frequency, f c , with a constant phase error of u e . Then the voltages<br />

v 1 (t) and v 2 (t) are obtained at the output of the baseband low-pass filters as shown. Since<br />

u e is small, the amplitude of v 1 (t) is relatively large compared to that of v 2 (t) (i.e., cos u e sin<br />

u e ). Furthermore, v 1 (t) is proportional to m(t), so it is the demodulated (product detector) output.<br />

The product voltage v 3 (t) is<br />

v 3 (t) = 1 2 11 2 A 0A c 2 2 m 2 (t) sin 2u e<br />

The voltage v 3 (t) is filtered with an LPF that has a cutoff frequency near DC, so that this filter<br />

acts as an integrator to produce the DC VCO control voltage<br />

v 4 (t) = K sin 2u e<br />

where K = 1 and m 2 (t) is the DC level of m 2 2 11 2 A 0A c 2 2 8m 2 1t29 8 9<br />

(t). This DC control voltage<br />

is sufficient to keep the VCO locked to f c with a small phase error u e .<br />

The squaring loop, shown in Fig. 5–3b, is analyzed by evaluating the expression for<br />

the signal out of each component block, as illustrated in the figure. Either the Costas PLL<br />

or the squaring loop can be used to demodulate a DSB-SC signal, because, for each case,<br />

the output is Cm(t), where C is a constant. Furthermore, either of these loops can be used to

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