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Sec. 4–14 Phase-Locked Loops and Frequency Synthesizers 289
AM signal
v 1 =A c [1+m (t)] sin( c t)
Quadrature
detector
LPF
In phase
detector
v 1 (t)
–90° phase
shift
v 0 (t)
VCO
LPF
v out (t)
Figure 4–24
PLL used for coherent detection of AM.
where f x is the frequency of the stable oscillator and N and M are the frequency-divider parameters.
This result is verified by recalling that when the loop is locked, the DC control signal
v 3 (t) shifts the frequency of the VCO so that v 2 (t) will have the same frequency as v in (t). Thus,
f x
M
= f out
N
(4–112)
which is equivalent to Eq. (4–111).
Classical frequency dividers use integer values for M and N. Furthermore, if programmable
dividers are used, the synthesizer output frequency may be changed by using software
that programs a microprocessor to select the appropriate values of M and N, according to Eq.
(4–111). This technique is used in frequency synthesizers that are built into modern receivers
with digital tuning. (See study aid Prob. SA4–6, for example, of frequency synthesizer design.)
For the case of M = 1, the frequency synthesizer acts as a frequency multiplier.
Equivalent noninteger values for N can be obtained by periodically changing the divider
count over a set of similar integer values. This produces an average N value that is noninteger
and is called the fractional-N technique. With fractional-N synthesizers, the instantaneous
value of N changes with time, and this can modulate the VCO output signal to produce
unwanted (spurious) sidebands in the spectrum. By careful design the sideband noise can be
Oscillator
(frequency standard)
f=f x
v x (t) Frequency v in (t) v 1 (t)
divider
÷ M
LPF
v 3 (t)
v 2 (t)
Frequency
divider
÷ N
v 0 (t)
VCO
v out (t)
Figure 4–25
PLL used in a frequency synthesizer.