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Sec. 4–14 Phase-Locked Loops and Frequency Synthesizers 287
As the testing signal frequency comes closer to f 0 , the beat-frequency waveform will become
nonsymmetrical, in which case it will have a nonzero DC value. This DC value tends to change the
frequency of the VCO to that of the input signal frequency, so that the loop will tend to lock.
The pull-in range, ∆f p , where the loop acquires lock will depend on exactly how the loop filter F(f)
processes the PD output to produce the VCO control signal. Furthermore, even if the input signal
is within the pull-in range, it may take a fair amount of time for the loop to acquire lock, since the
LPF acts as an integrator and it takes some time for the control voltage (filter output) to build up to
a value large enough for locking to occur. The analysis of the pull-in phenomenon is complicated.
It is actually statistical in nature, because it depends on the initial phase relationship of the input
and VCO signals and on noise that is present in the circuit. Consequently, in the measurement of
∆f p , several repeated trials may be needed to obtain a typical value.
The locking phenomenon is not peculiar to PLL circuits, but occurs in other types of
circuits as well. For example, if an external signal is injected into the output port of an oscillator
(i.e., a plain oscillator, not a VCO), the oscillator signal will tend to change frequency
and will eventually lock onto the frequency of the external signal if the latter is within the
pull-in range of the oscillator. This phenomenon is called injection locking or synchronization
of an oscillator and may be modeled by a PLL model [Couch, 1971].
The PLL has numerous applications in communication systems, including (1) FM
detection, (2) the generation of highly stable FM signals, (3) coherent AM detection, (4)
frequency multiplication, (5) frequency synthesis, and (6) use as a building block within
complicated digital systems to provide bit synchronization and data detection.
Let us now find what conditions are required for the PLL to become an FM detector.
Referring to Fig. 4–21, let the PLL input signal be an FM signal. That is,
where
or
t
v in (t) = A i sin cv c t + D f m(l) dl d
L
t
u i (t) = D f m(l) dl
L
-q
-q
(4–105a)
(4–105b)
® i (f) =
D f
j2pf M(f)
(4–105c)
and m(t) is the baseband (e.g., audio) modulation that is to be detected. We would like to find
the conditions such that the PLL output, v 2 (t), is proportional to m(t). Assume that f c is within
the capture (pull-in) range of the PLL; thus, for simplicity, let f 0 = f c . Then the linearized PLL
model, as shown in Fig. 4–22, can be used for analysis. Working in the frequency domain, we
obtain the output
V 2 (f) =
aj 2pf
K v
bF 1 (f)
F 1 (f) + ja 2pf
K v K d
b
® i (f)