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Sec. 3–5 Line Codes and Spectra 181
shown in Fig. 3–21. The control voltage w 3 (t) for the voltage-controlled clock (VCC) is a
smoothed (averaged) version of w 2 (t). That is,
w 3 (t) = 8w 2 (t)9
(3–51a)
where
w 2 (t) = |w 1 (t + nT b -¢)| - |w 1 (t + nT b +¢)| (3–51b)
(The averaging operation is needed so that the bit synchronizer will remain synchronized even
if the data do not alternate for every bit interval.) If the VCC is producing clocking pulses
with the optimum relative clocking time t = t 0 so that samples are taken at the maximum
of the eye opening, Eq. (3–51) demonstrates that the control voltage w 3 (t) will be zero. If t
is late, w 3 (t) will be a positive correction voltage, and if t is early, w 3 (t) will be negative.
A positive (negative) control voltage will increase (decrease) the frequency of the VCC. Thus,
the bit synchronizer will produce an output clock signal that is synchronized to the input
data stream. Then w 4 (t) will be a pulse train with narrow clock pulses occurring at the time
t = t + nT b , where n is any integer and t approximates t 0 , the optimum clock phase that
corresponds to sampling at the maximum of the eye opening. It is interesting to realize that
the early-late bit synchronizer of Fig. 3–21 has the same canonical form as the Costas carrier
synchronization loop of Fig. 5–3.
Unipolar, polar, and bipolar bit synchronizers will work only when there are a sufficient
number of alternating 1’s and 0’s in the data. The loss of synchronization because of long
strings of all 1’s or all 0’s can be prevented by adopting one of two possible alternatives. One
alternative, as discussed in Chapter 1, is to use bit interleaving (i.e., scrambling). In this case,
the source data with strings of 1’s or 0’s are scrambled to produce data with alternating l’s and
0’s, which are transmitted over the channel by using a unipolar, polar, or bipolar line code. At
the receiving end, scrambled data are first recovered by using the usual receiving techniques
with bit synchronizers as just described; then the scrambled data are unscrambled. The other
alternative is to use a completely different type of line code that does not require alternating
data for bit synchronization. For example, Manchester NRZ encoding can be used, but it will
require a channel with twice the bandwidth of that needed for a polar NRZ code.
Power Spectra for Multilevel Polar NRZ Signals
Multilevel signaling provides reduced bandwidth compared with binary signaling. The concept
was introduced in Sec. 3–4. Here this concept will be extended and a formula for the PSD of a
multilevel polar NRZ signal will be obtained. To reduce the signaling bandwidth, Fig. 3–22 shows
how a binary signal is converted to a multilevel polar NRZ signal, where an -bit DAC is used to
convert the binary signal with data rate R bitssec to an L = 2 -level multilevel polar NRZ signal.
For example, assume that an = 3-bit DAC is used, so that L = 2 3 = 8 levels. Fig. 3–22b
illustrates a typical input waveform, and Fig. 3–22c shows the corresponding eight-level multilevel
output waveform, where T s is the time it takes to send one multilevel symbol. To obtain
this waveform, the code shown in Table 3–5 was used. From the figure, we see that D = 1T s =
1(3T b ) = R3, or, in general, the baud rate is
D = R /
(3–52)