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Sec. 3–5 Line Codes and Spectra 177<br />

Low-level<br />

distorted<br />

input<br />

Amplified filter<br />

Filter<br />

Sample and hold<br />

Decision-making circuit<br />

+<br />

Comparator<br />

–<br />

High-level<br />

regenerated<br />

output<br />

Clock<br />

t<br />

Figure 3–19<br />

Bit synchronizer<br />

(timing circuit)<br />

V T<br />

Regenerative repeater for unipolar NRZ signaling.<br />

t<br />

cascade along the line and at the receiver, as illustrated in Fig. 3–7. These repeaters amplify<br />

and “clean up” the signal periodically. If the signal were analog instead of digital, only linear<br />

amplifiers with appropriate filters could be used, since relative amplitude values would need<br />

to be preserved. In this case, in-band distortion would accumulate from linear repeater to<br />

linear repeater. This is one of the disadvantages of analog signaling. However, with digital<br />

signaling, nonlinear processing can be used to regenerate a “noise-free” digital signal. This<br />

type of nonlinear processing is called a regenerative repeater. A simplified block diagram of<br />

a regenerative repeater for unipolar NRZ signaling is shown in Fig. 3–19. The amplifying<br />

filter increases the amplitude of the low-level input signal to a level that is compatible with the<br />

remaining circuitry and filters the signal in such a way as to minimize the effects of channel<br />

noise and ISI. (The filter that reduces ISI is called an equalizing filter and is discussed in<br />

Sec. 3–6.) The bit synchronizer generates a clocking signal at the bit rate that is synchronized,<br />

so that the amplified distorted signal is sampled at a point where the eye opening is a maximum.<br />

(Bit synchronizers are discussed in detail in the next section.) For each clock pulse, the<br />

sample-and-hold circuit produces the sample value that is held (for T b , a 1-bit interval) until<br />

the next clock pulse occurs. The comparator produces a high-level output only when the<br />

sample value is larger than the threshold level V T . The latter is usually selected to be one-half<br />

the expected peak-to-peak variation of the sample values. † If the input noise is small and there<br />

is negligible ISI, the comparator output will be high only when there is a binary 1 (i.e., a high<br />

level) on the corrupted unipolar NRZ line code at the input to the repeater. The comparator—<br />

a threshold apparatus—acts as a decision-making device. Thus, the unipolar NRZ line code is<br />

regenerated “noise free,” except for bit errors that are caused when the input noise and ISI<br />

alter the sample values sufficiently so that the sample values occur on the wrong side of V T .<br />

Chapter 7 shows how the probability of bit error is influenced by the SNR at the input to the<br />

repeater, by the filter that is used, and by the value of V T that is selected. ‡<br />

In long-distance digital communication systems, many repeaters may be used in cascade,<br />

as shown in Fig. 3–7. Of course, the spacing between the repeaters is governed by the path loss<br />

of the transmission medium and the amount of noise that is added. A repeater is required when<br />

the SNR at a point along the channel becomes lower than the value that is needed to maintain the<br />

† This is the optimum V T when the binary 1’s and 0’s are equally likely.<br />

‡ For minimum probability of bit error, the sample-and-hold circuit of Fig. 3–19 is replaced by an optimum<br />

sample-detection circuit called a matched filter (MF), described in Sec. 6–8.

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