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518 DPSK signal plus noise in Bandpass filter H(f) B T –f c f c f One-bit delay, T Integrate and dump Integrator t 0 ( ) dt t 0 – T r 0 (t) Analog output Sample and hold r 0 (t 0 ) Threshold device ~ m m ~ V T r 0 Digital output (a) A Suboptimum Demodulator Using an Integrate and Dump Filter Bit sync (from bit sync circuits) DPSK signal plus noise in h(t)= Bandpass matched filter cos ( c t) (b) An Optimum Demodulator Using a Bandpass Matched Filter ( t 0.5T T ( Figure 7–12 One-bit delay, T Demodulation of DPSK. Wideband low-pass filter r 0 (t) Sample and hold r 0 (t 0 ) Bit sync (from bit sync circuits) Threshold device ~ m m ~ V T r 0 Digital output
- Page 1034: Sec. 7-1 Error Probabilities for Bi
- Page 1038: Sec. 7-1 Error Probabilities for Bi
- Page 1042: Sec. 7-1 Error Probabilities for Bi
- Page 1046: Sec. 7-2 Performance of Baseband Bi
- Page 1050: Sec. 7-2 Performance of Baseband Bi
- Page 1054: Sec. 7-2 Performance of Baseband Bi
- Page 1058: Sec. 7-3 Coherent Detection of Band
- Page 1062: Sec. 7-3 Coherent Detection of Band
- Page 1066: Sec. 7-3 Coherent Detection of Band
- Page 1070: Sec. 7-4 Noncoherent Detection of B
- Page 1074: Sec. 7-4 Noncoherent Detection of B
- Page 1078: Sec. 7-4 Noncoherent Detection of B
- Page 1082: Sec. 7-4 Noncoherent Detection of B
- Page 1088: 520 QPSK signal plus noise (data ra
- Page 1092: TABLE 7-1 COMPARISON OF DIGITALSIGN
- Page 1096: 524 Performance of Communication Sy
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518<br />
DPSK signal<br />
plus noise in<br />
Bandpass filter<br />
H(f)<br />
B T<br />
–f c f c<br />
f<br />
One-bit<br />
delay, T<br />
Integrate and dump<br />
Integrator<br />
t 0<br />
( ) dt<br />
t 0 – T<br />
<br />
r 0 (t)<br />
Analog output<br />
Sample<br />
and<br />
hold<br />
r 0 (t 0 )<br />
Threshold<br />
device<br />
~ m m ~<br />
V T<br />
r 0<br />
Digital<br />
output<br />
(a) A Suboptimum Demodulator Using an Integrate and Dump Filter<br />
Bit sync<br />
(from bit sync circuits)<br />
DPSK signal<br />
plus noise in<br />
h(t)=<br />
Bandpass matched filter<br />
cos ( c t)<br />
(b) An Optimum Demodulator Using a Bandpass Matched Filter<br />
(<br />
t 0.5T<br />
T<br />
(<br />
Figure 7–12<br />
One-bit<br />
delay, T<br />
Demodulation of DPSK.<br />
Wideband<br />
low-pass<br />
filter<br />
r 0 (t)<br />
Sample<br />
and<br />
hold<br />
r 0 (t 0 )<br />
Bit sync<br />
(from bit sync circuits)<br />
Threshold<br />
device<br />
~ m m ~<br />
V T<br />
r 0<br />
Digital<br />
output