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continued from part 1 - Controller General of Patents, Designs, and ...

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(12) PATENT APPLICATION PUBLICATION (21) Application No.6328/DELNP/2008 A<br />

(19) INDIA<br />

(22) Date <strong>of</strong> filing <strong>of</strong> Application :18/07/2008 (43) Publication Date : 24/10/2008<br />

(54) Title <strong>of</strong> the invention : METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE<br />

(51) International classification :H01L 21/762 (71)Name <strong>of</strong> Applicant :<br />

(31) Priority Document No :05112835.3 1)NXP B.V.<br />

(32) Priority Date :22/12/2005<br />

Address <strong>of</strong> Applicant :HIGH TECH CAMPUS 60, NL-5656<br />

(33) Name <strong>of</strong> priority country :EPO<br />

AG EINDHOVEN (NL) Netherl<strong>and</strong>s<br />

(86) International Application No :PCT/IB2006/054928 (72)Name <strong>of</strong> Inventor :<br />

Filing Date<br />

:18/12/2006<br />

1)SONSKY, JAN<br />

(87) International Publication No :WO 2007/072406 2)VAN NOORT, WIBO, D.<br />

(61) Patent <strong>of</strong> Addition to Application<br />

Number<br />

Filing Date<br />

:NA<br />

:NA<br />

(62) Divisional to Application Number :NA<br />

Filing Date<br />

:NA<br />

(57) Abstract :<br />

A method <strong>of</strong> manufacturing a semiconductor device wherein a laminate structure comprising a sacrificial layer is s<strong>and</strong>wiched between<br />

two etch stop layers (8,11) <strong>and</strong> which separates a semiconductor membrane (9) <strong>from</strong> a bulk substrate (1) is used to provide an<br />

underetched structure. Access trenches (4) <strong>and</strong> support trenches (5) are formed in the layered structure through the thickness <strong>of</strong> the<br />

semiconductor layer (9) <strong>and</strong> through the upper etch stop layer (8). The support trenches extend deeper through the sacrificial layer<br />

(12) <strong>and</strong> the lower etch stop layer <strong>and</strong> are filled. The sacrificial layer is exposed <strong>and</strong> etched away selectively to the etch stop layers to<br />

form a.cavity (30) <strong>and</strong> realise a semiconductor membrane which is attached to the bulk substrate via a vertical support structure<br />

comprising the filled support trenches.<br />

No. <strong>of</strong> Pages : 32 No. <strong>of</strong> Claims : 14<br />

The Patent Office Journal 24/10/2008 25803

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