Chapter 5 Robust Performance Tailoring with Tuning - SSL - MIT

If the hardware meets the requirement then no tuning is necessary and it is considered
nominally successful. However, if σHW is not within the requirement, then the hard-
ware simulation is tuned assuming that the exact uncertainty parameter values, �pMC,
are known, a procedure referred to as baseline tuning in Chapter 4. In reality, the
tuning would take place through a model updating technique such as isoperformance
tuning (see Chapter 4), however for the purposes of this study it is only necessary
to determine if it is possible to tune the hardware below requirement, so baseline
tuning is adequate. The results of the simulations include the nominal hardware
performances and the tuned hardware performances for each of the designs.
Data: PT, RPT, RPTT designs, uncertainty model, nsims
Result: nominal HW performance, tuned HW performance
begin
for i = to nsims do
Randomly choose �pMC from uncertainty model
for PT, RPT and RPTT designs do
Generate HW simulation by applying �pMC to model
Evaluate nominal HW performance, σHW
if σHW >σreq then
Tune HW simulation with knowledge of �pMC → baseline tuning
Evaluate tuned performance, σtune, andstore
end
end
end
end
Figure 5-6: Hardware simulation algorithm.
The PT, RPT (AO) and RPTT designs generated based on an uncertainty model
with ∆ = 10%, α = 0.0 andσreq = 220µm are used to generate 200 hardware
simulations. A map of the uncertainty space explored is plotted in Figure 5-7. The
nominal uncertainty values are marked with the large dot in the middle of the grid
and the bounds are denoted by the box around the grid. Each of the realizations
used to generate the hardware simulations is marked with a dot. Note that although
the 200 simulations aren’t quite enough to fill the space, they do an adequate job of
sampling it.
The results of the hardware simulation are presented in Figure 5-8. The upper plot,
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