eldo_user

IBIS Models Support in Eldo
Example 4—Simultaneous Switching Output Noise
is defined using the pattern function with high voltage level of 3.3V, low voltage level of 0V,
1ns starting delay time, 0.1ns rise and fall times, 5ns sample time and have the pattern 0110.
.connect _IO_comp_5_d_receive _IO_comp_1_d_drive
.connect _IO_comp_6_d_receive _IO_comp_2_d_drive
.connect _IO_comp_7_d_receive _IO_comp_3_d_drive
Connects the input buffers digital output to the output buffers digital input.
The next part of the netlist specifies the simulation control directives indicating what type of
simulation Eldo should perform on the circuit.
.tran 10p 50n
Specifies a transient analysis be performed lasting 50ns with a plotting increment of 10ps.
.option step=10p
Imposes a time step of 10 ps.
.plot tran v(_IO_comp_1) v(_IO_comp_2) v(_IO_comp_3)
Specifies voltage/time plots of the voltages at pins 1, 2, and 3 of the IBIS component.
Simulation Results
Figure 17-23. Simultaneous Switching Output Noise (SSON) Simulation Results
A difference is observed in the results from the case when package=1 was set (compare yellow
and blue waveforms). The time varying signal at OUT1 and OUT2 is not only due to IR and
LdI/dt voltage drops on the supply pin, but in addition has the capacitive and inductive coupling
between the package pins.
798
Eldo® User's Manual, 15.3