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IBIS Models Support in Eldo<br />

Example 3—Package Parasitics Cross Talk<br />

Netlist Explanation<br />

_IO_Trx<br />

+ file="tx_rx.ibs"<br />

+ component="transceiver"<br />

+ package=3<br />

The above lines instantiate an IBIS component. Component instantiation means all the buffers<br />

inside the component as well as coupling between pins can be simulated. The component is<br />

named transceiver and located in the tx_rx.ibs IBIS file. The package parameter in the _IO<br />

element specifies the package modeling type to be used. In our case, package=3 means that the<br />

advanced package model, located in the tx_rx.ibs IBIS file under [Define package model] will<br />

be used.<br />

vp _IO_Trx_5 0 pwl (0 0 1n 0 1.6n 3.3 8n 3.3 8.6n 0)<br />

Instantiates the stimulus vp which is a pulse waveform connected between pin 5 of the IBIS<br />

component and ground. It is important to note that all other component pins exist in the<br />

simulation but left unconnected here. A warning will appear about these unconnected pins.<br />

vcc _IO_TRX_4 0 3.3<br />

.connect _IO_TRX_1_d_drive 0<br />

.connect _IO_TRX_2_d_drive 0<br />

.connect _IO_TRX_3_d_drive 0<br />

.connect _IO_TRX_8 0<br />

Rterm1 _IO_TRX_5_d_receive 0 1e6<br />

Rterm2 _IO_TRX_6_d_receive 0 1e6<br />

Rterm3 _IO_TRX_7_d_receive 0 1e6<br />

The above lines have no impact on the simulation results. They are used to avoid warnings<br />

about nodes that have less than two connections. A voltage source vcc is connected between the<br />

node _IO_TRX_4 and ground. The digital inputs of the output buffers (_IO_TRX_1_d_drive,<br />

_IO_TRX_2_d_drive and _IO_TRX_3_d_drive) are tied to ground using the .connect<br />

statement. Also the node _IO_TRX_8 is connected to ground. Then 1MΩ resistors are<br />

connected between the digital outputs of the input buffers (_IO_TRX_5_d_receive,<br />

_IO_TRX_6_d_receive and _IO_TRX_7_d_receive) and ground.<br />

The next part of the netlist specifies the simulation control directives indicating what type of<br />

simulation Eldo should perform on the circuit.<br />

.tran 1p 14n<br />

Specifies a transient analysis be performed lasting 14ns with a plotting increment of 1ps.<br />

.option step=1p<br />

Imposes a time step of 1ps. This small time step is imposed to capture the ringing that will occur<br />

on pin 6 due to both capacitive and inductive coupling with pin 5.<br />

.plot tran v(_IO_TRX_5) v(_IO_TRX_6)<br />

Eldo® User's Manual, 15.3 795

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