eldo_user

Analyzing Simulation Results
Non-Convergence Analysis
Note 88: DIAGMODE(CONV) checking devices behavior at time 151.2517296711Us...
Note 90: Change sign detected while sweeping node XIOCDX.XR1.DX_RNWELL.N4
Note 91: On wave number 6, IX(XIOCDX.XR1.DX_RNWELL.6) at -185.0000MV
Note 90: Change sign detected while sweeping node XIOCDX.XR1.XI
Note 91: On wave number 6, IX(XIOCDX.XR1.DX_RNWELL.6) at -185.0000MV
Note 90: Change sign detected while sweeping node XIOCDX.LDMOS
Note 91: On wave number 4, ICB(XIOCDX.XMN4_1.M_NMOSMV) at -356.0000MV
Note 91: On wave number 5, QD(XIOCDX.XMN4_1.M_NMOSMV) at -365.0000MV
Note 91: On wave number 8, QB(XIOCDX.XMN4_1.M_NMOSMV) at -1.3280 V
Note 90: Change sign detected while sweeping node XIOCDX.GM12
Note 91: On wave number 4, ICB(XIOCDX.XMN4_1.M_NMOSMV) at 803.0000MV
Note 90: Change sign detected while sweeping node XIOCDX.GM12
Note 91: On wave number 4, ICB(XIOCDX.XI12.XI_1.XMMN1.M_DX_NMOS) at 2.0000M V
Note 91: On wave number 7, QS(XIOCDX.XI12.XI_1.XMMN1.M_DX_NMOS) at -184.0000MV
Because this stage can take some time, when Eldo starts checking it displays the Note 88 each
time. For each device connected to a problematic node Eldo does a voltage sweep of that node
and checks the derivatives of the characteristics of the devices with respect to that node. If the
sign of the derivative changes then it means that the characteristic is non-monotonous (Note 90)
and Eldo prints the name of the curves for which the sign of the derivative changed (Note 91).
Even if this is not always a problem for Newton, or if the convergence issue can come from
something else, this is usually an unsatisfactory characteristic and it could slow convergence or
even lead to non-convergence. If at least one characteristic was detected as non-monotonous
then all the sweeps done at that particular time point are saved in the new .wdb database. If
nothing is detected then nothing is saved.
Example of a generated database:
Eldo also generates a small netlist with the model card instantiated with the computed parameter
values. The device is instantiated with all its nodes (including the internal nodes), each of these
nodes connected to a voltage source so the bias condition is exactly the same as during the
simulation at that particular time point. Eldo also creates the required plot for all the simulation
characteristics of the device (current, charges, or internal states for the Verilog-A models). You
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