eldo_user

Specifying Simulation Output
High Impedance Node Check Examples
***** Pass Gate Example *******
.HIZ type=gate r=1e8
.subckt pass_gate input1 input2 output
mp1 vdd input1 n1 vdd pmos L=5e-7 W=2e-5
mn1 n1 input1 0 0 nmos L=8E-07 W=2E-06
mn3 n2 input2 n1 0 nmos L=8E-07 W=2E-06
mp2 vdd n2 output vdd pmos L=5e-7 W=2e-5
mn2 output n2 0 0 nmos L=8E-07 W=2E-06
.ends
vdd vdd 0 3.3
vin1 in1 0 pwl (0 0 9n 0 10n 3.3 15n 3.3 15.5n 0)
vin2 in2 0 pwl (0 5.3 2n 5.3 4n 5.3 10n 4.3 12n 0)
x1 in1 in2 out pass_gate
r1 out 0 1k
.probe tran V I
.plot tran vgs(*) vgd(*) vds(*)
.tran 20u 20u
.end
No report file is specified on the command, so the HiZ information is written to the .chi file, for
example:
***HIGH IMPEDANCE DETECTION
TRANSIENT ANALYSIS
TEMPERATURE = 2.7000E+01 Celsius
*> X1.N2 :
*> X AXIS WINDOW: [6.740E-09 9.819E-09]
Impedance min: 2.725E+08 | max: 9.999E+11 | average: 8.478E+11
*> X AXIS WINDOW: [1.172E-08 2.000E-05]
Impedance min: 8.150E+08 | max: 9.997E+11 | average: 9.859E+11
See Also
• .HIZ in the Eldo Reference Manual
• .OPTION ADIT_CHECK in the Eldo Reference Manual
Related Topics
High Impedance Node Checks
Tutorial—High Impedance Fault Detection of a PLL Circuit
Eldo® User's Manual, 15.3 351