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Eldo Netlist Setup<br />

encrypt_<strong>eldo</strong> Tool<br />

• .INLINE/.ENDINLINE act as .SUBCKT/.ENDS. The inline block is encrypted in the<br />

same way as subcircuits; it does not require the -veriloga argument.<br />

• For partial encyrption, use the Verilog-A source code directives `pragma protect begin<br />

\ `pragma protect end, `protect \ `endprotect, or `protect begin \ `protect end, to<br />

specify the blocks for protection inside the Verilog-A model file.<br />

• By default -veriloga encrypts the complete file, except the lines containing the keywords<br />

module, macromodule, endmacromodule, endmodule.<br />

Examples<br />

1. Unencrypted netlist (diode.lib):<br />

.model DNPPSJU<br />

+ d level=8 diolev=9 tr=27 tnom=27<br />

+ vr=0 cjbr=0.00072727 cjsr=8.649e-12<br />

+ cjgr=3.946e-10 jsdbr=3.5987e-07 jsdsr=3.4372e-12<br />

+ jsdgr=6.9543e-14 jsgbr=6.0153e-06 jsgsr=1.0506e-09<br />

+ jsggr=6.4326e-10 vdbr=0.55572 vdsr=0.49482<br />

+ vdgr=0.79381 pb=0.44466 ps=0.99<br />

+ pg=0.43889 nbj=1 nsj=1.2<br />

+ ngj=1<br />

.subckt diode A B<br />

.model my_diode D diolev=9 tr=27<br />

tnom=27<br />

+ vr=0 cjbr=0.00072727 cjsr=8.649e-12<br />

+ cjgr=3.946e-10 jsdbr=3.5987e-07 jsdsr=3.4372e-12<br />

R1 A A1 1k<br />

D1 A1 B1 my_diode<br />

R2 B1 B 1k<br />

.ends<br />

2. Command for encrypting this netlist with the Eldo license:<br />

encrypt_<strong>eldo</strong> -i diode.lib -o diode_crypt.lib<br />

3. Output file generated (diode_crypt.lib):<br />

Eldo® User's Manual, 15.3 141

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