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Examples
Tutorial—Using Power Analysis for Static Leakage Analysis of a PLL Circuit
14. In this last part of the tutorial you will reduce the slope of the power supply ramp and
observe the impact of this change on the power consumption.
Edit the main netlist Power_Analysis_PLL.cir in your preferred text editor, and change
the value of the parameter trise (used by the VDD voltage source) from 1ps to 900ns, as
shown below (comment and uncomment the lines in the netlist accordingly):
*.param pvdd=1 trise=1p
.param pvdd=1 trise=900n
Because we want to primarily analyze the impact of this change on the XPD block,
refine the power analysis by updating the Eldo command with the following change to
filter on the name xpd (comment and uncomment the lines in the netlist accordingly):
*.power_analysis
.power_analysis filter(name)=xpd
15. Re-run Eldo and open the file Power_Analysis_PLL.wdb in EZwave. Repeat the actions
described in steps 3 and 4 to run a power analysis on the PLL design. You will obtain the
following result:
1356
Eldo® User's Manual, 15.3