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Examples
Tutorial—Using Power Analysis for Static Leakage Analysis of a PLL Circuit
Tutorial—Using Power Analysis for Static
Leakage Analysis of a PLL Circuit
Netlist file: power_analysis/Power_Analysis_PLL.cir
In this tutorial you will use the Eldo power analysis to visualize the power consumption of a
PLL design and its components.
The tutorial demonstrates how to visualize the static leakage of a PLL. To do this, the VDD
supply is set to 1V with all other inputs set to 0V (see Figure 21-41), and then the power
consumption is checked.
Video
To watch this tutorial, see the video Power Analysis.
The following files are provided for this tutorial in the power_analysis directory:
• Power_Analysis_PLL.cir — Main Eldo netlist file. (The PLL circuit is encrypted.)
• PLL_UVM_SUBCKT.include.crypt — Encrypted subckt definitions.
• bsim46.corners.lib.crypt — Encrypted BSIM4 model file.
• dspc_cmos.lib.crypt — Encrypted subckt definitions.
Figure 21-41. PLL Circuit for Power Analysis
Eldo® User's Manual, 15.3 1343