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Examples<br />

Example 24—Cell Characterization: Setup Time Extraction<br />

.option mtfile<br />

The above line forces the creation of a .mt0 file, where the final values of all measurements<br />

(including ts) can be read (view extract_setup_time_passfail.mt0).<br />

.plot tran v(in) v(ck) v(out)<br />

The above line specifies that voltage/time plots should be performed of the inputs and output<br />

voltages at nodes in, ck and out respectively.<br />

.extract tran label=tp (xup(v(out), 'ps/2', 0n, 100n, 1) - xdown(v(ck),<br />

'ps/2', 0n, 100n, 1))<br />

The above line specifies to extract the tp variable, which is the delay between the clock edge<br />

and the output signal edge.<br />

.optimize method=passfail results=tp relin=0.001<br />

.paramopt ts=(1n, -5n, 5n)<br />

The above lines specify the .OPTIMIZE command is used with the passfail method. The goal is<br />

the tp variable, and the variable to optimize is ts (the setup time)<br />

The command is very compact and requires further explanation:<br />

The parameter to optimize is defined with the .PARAMOPT statement: it is the value of the<br />

setup time ts (see the VIN source definition). If the edge of the IN signal occurs early enough,<br />

the flip-flop will be able to sample the input data. If it is too late (too close to the clock edge),<br />

the flip-flop will not be able to sample the data and the output will not switch. The purpose of<br />

the setup time extraction is to find the exact transition between these two behaviors, using a<br />

dichotomy algorithm on the input optimization variable (tin in this example). A dichotomy<br />

algorithm find a solution by dividing in half the search interval at each iteration.<br />

As in any numerical root-finding algorithm, it is very important to feed the command with<br />

initial values that 'bracket' the solution. Eldo will start anyway by verifying that the lowest value<br />

corresponds to a 'pass', and the highest value corresponds to a 'fail' situation (you can easily see<br />

this if you look into the standard output of the simulation). In this example, we use the interval<br />

[-5n 5n] for the initial bracketing of 'ts'. If the edge happens at tck-5n, we are sure that the setup<br />

time will be respected, and it will thus be a 'pass'. If it only happens at tck+5n (well after the<br />

clock edge) we are sure that the setup time will be violated and thus the flip-flop will 'fail' (the<br />

output will not toggle).<br />

To minimize the number of iterations, it is of course desirable to use an initial bracketing<br />

interval that is as narrow as possible. This requires a priori knowledge of the circuit, and needs<br />

to be indicated by the <strong>user</strong>, Eldo cannot completely 'guess' it.<br />

The iterations will find the value of the parameter to 'optimize', that is 'ts', which corresponds to<br />

the transition from 'pass' to 'fail'. The 'ts' value that corresponds to this pass/fail transition is<br />

nothing but the desired setup time.<br />

Eldo® User's Manual, 15.3 1335

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