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Examples<br />

Example 11—Loop Stability of an Opamp<br />

.PARAM pCX=0.2P<br />

CX M8D OUT pCX ! COMPENSATION CAP.<br />

CL OUT 0 1p ! LOAD CAP.<br />

The above lines specify the circuit has a capacitive load, and a compensation capacitor is set so<br />

that phase margin is approx. 45°.<br />

.OPTION tuning=vhigh<br />

The above line sets the simulator accuracy to very high.<br />

VDD VDD 0 1.65V<br />

VSS VSS 0 -1.65V<br />

VB BIAS 0 0.95V<br />

VINP INP 0 AC 1 0<br />

The above lines specify the power supplies, bias, and input.<br />

.ac dec 10 1 1e8<br />

The above line indicates that an AC analysis is performed on the circuit within the frequency<br />

range 1Hz to 100MHz with 10 steps per decade.<br />

.LSTB VSTB<br />

The above line indicates that a loop stability analysis is performed on the circuit.<br />

.plot ac lstb_db<br />

.plot ac lstb_p<br />

The above lines request the loop stability output plots of loop gain and phase.<br />

1300<br />

Eldo® User's Manual, 15.3

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