eldo_user

Examples
Example 9—Transient and AC Analysis of a Switched Capacitor Low Pass Filter
• .PLOT—Plot simulator results.
Netlist Explanation
.param ts = 1.000000e-05
The above line specifies the sampling period used in the integrator instances.
.subckt sc_int inp inm out
y1 sc_ideal inp inm out
y2 sc_u inm out param: c=c tp=tp
.ends sc_int
The above lines indicate the switched capacitor integrator subcircuit definition. The subcircuit
is called sc_int and is connected between the nodes inp, inm and out.
* INTEGRATOR 1
xi01 0 501 1 SC_INT c=5.173415p tp=ts
y002 sc_n pin: 2 0 501 0 param: c=1.347451p tp=ts
y003 sc_n pin: INPUT 0 501 0 param: c=1.623277p tp=ts
y004 sc_n pin: 1 0 501 0 param: c=1.000000p tp=ts
* INTEGRATOR 2
xi05 0 502 2 sc_int c=5.839726p tp=ts
y006 sc_i pin: 1 0 502 0 param: c=1.232076p tp=ts ldi=2
y007 sc_i pin: 3 0 502 0 param: c=1.000000p tp=ts ldi=2
* INTEGRATOR 3
xi08 0 503 3 sc_int c=4.117249p tp=ts
y009 sc_n pin: 2 0 503 0 param: c=1.660161p tp=ts
y010 sc_n pin: 3 0 503 0 param: c=1.000000p tp=ts
.tran 1u 500u
.ac dec 500 100 1meg
The above lines specify that a transient analysis should be performed on the circuit lasting
500μs with a plotting increment of 1μs; and an AC analysis within the frequency range 100Hz
to 1MHz with 500 steps per decade.
.plot tran v(input)
.plot tran v(1)
.plot tran v(2)
.plot tran v(3)
The above lines specify that voltage/time plots should be performed on separate graphs of the
voltage at nodes input, 1, 2, and 3.
.plot ac vdb(1)
.plot ac vdb(2)
.plot ac vdb(3)
The above lines specify that dB/frequency plots of the nodes 1, 2 and 3 are requested on
separate graphs.
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Eldo® User's Manual, 15.3