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Speed and Accuracy<br />

Simulation of Large Circuits<br />

significant impacts. Detailed discussion of these options can be found in “Limiting the<br />

Size of Transient Output Files” on page 353.<br />

See .OPTION OUT_STEP, .OPTION INTERP, .OPTION FREQSMP and .OPTION<br />

OUT_RESOL in the Eldo Reference Manual.<br />

• Use the Periodic Circuit Speedup(PCS) option.<br />

Used to increase the simulation speed for circuits with periodic or nearly periodic<br />

nature. PLLs in near-lock state belong to this category. The amount of speedup depends<br />

on the design nature; the speedup will be more significant with relatively large circuits.<br />

With circuits showing no periodicity at all, the option will not usually provide any<br />

speedup. Periodic Circuit Speedup is invoked by setting PCS=1|2 for BSIM3v3 models<br />

only (PCS=1|2 represent two possible speed optimization methods, PCS=1 is<br />

recommended) or PCS=3 for BSIM4 and BSIM3v3 models (with same speed<br />

optimization as PCS=1). The default is 0. This option only supports the BSIM3v3 and<br />

BSIM4 models.<br />

BSIM4, unlike BSIM3, has many parasitic configurations: gate resistors, body resistors<br />

network, bias dependent access resistors, and so on. These parasitic configurations are<br />

controlled by a set of instance and model parameters (Rdsmod, Rbodymod, and<br />

Rgatemod). As the complexity of the parasitic configuration around the core model<br />

increases, the gain expected by the PCS decreases.<br />

This option should not affect the accuracy of the results.<br />

See .OPTION PCS in the Eldo Reference Manual.<br />

• Try suppressing DC analysis for large digital circuits.<br />

This is achieved by setting the UIC option of the .TRAN command. Very large circuits<br />

are often digital circuits for which an accurate and time-consuming DC analysis may not<br />

be necessary. The logical initialization performed by Eldo prior to any analysis should<br />

ensure that the transient analysis that follows will start with nodes correctly preset.<br />

Initial voltage conditions are specified using the .IC command.<br />

• Decrease the accuracy for MOS digital circuits.<br />

For MOS digital circuits, accuracy can often be decreased to 10mV instead of the<br />

default value of 5mV. This can significantly reduce CPU time.<br />

• Employ the .USE command.<br />

It may be useful to split the circuit into a number of blocks, find DC solutions for each<br />

block, and then find the DC solution of the circuit as a whole using the separate<br />

solutions as a starting point.<br />

Related Topics<br />

Tips for Improving Simulation Performance<br />

1258<br />

Eldo® User's Manual, 15.3

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