eldo_user

Speed and Accuracy
Simulation of Large Circuits
In this case, Eldo directly allocates the correct amount of memory, reducing the
requirement of using the expensive C function realloc().
See .OPTION MAXNODES and .OPTION MAXTRAN in the Eldo Reference Manual.
• Collapse the intrinsic MOS transistor nodes.
When simulating large circuits containing mostly MOS transistors, the number of nodes
grows very quickly with the number of MOSs. By default, Eldo creates explicit internal
nodes for the drain and source parasitic access resistors. Thus each MOS transistor with
non-zero access resistors adds two internal nodes to the system. Although these nodes
do not connect to anything else, and the sparse techniques used to solve the matrices
greatly reduce the impact of these additional nodes upon the CPU time, they still
contribute to create a much larger system. For example if 50,000 MOSs are instantiated,
the typical size of the circuit could be 30,000 or 50,000 ‘true’ nodes, but grows to
130,000 or 150,000 with two internal nodes per MOS transistor. Even for Eldo, this is
quite a change in problem size.
An option exists to collapse these resistors into the drain current calculation, thus
avoiding explicit creation of these intrinsic nodes. This option is NONWRMOS. With
this option, the effect of the parasitic resistors upon the drain current is still taken into
account, although not as accurately as when the nodes are explicitly created.
Particularly, some of the overlap capacitances in the MOS model become connected to
the external drain/source, whereas they really are connected to the internal nodes. This
may change results slightly.
However, experience has shown that the accuracy degradation is barely measurable,
particularly when these resistors remain small. When having to simulate huge circuits,
this is worth considering. It is, however, recommended to calibrate the accuracy
degradation caused by the option with a reasonably small circuit first, and then to decide
whether this degradation is acceptable or not for the larger circuit.
This option, as its name indicates, only affects MOS transistors. It has no effect upon the
handling of the internal base, collector, and emitter nodes of bipolar transistors, nor
upon diodes.
When this option is active, there might be situations where DC cannot be found. If this
happens, remove the option. Even when DC is found, if the netlist contains some MOS
devices with forward-biased bulk-source and bulk-drain junctions, Eldo will detect such
situations during DC convergence, and will re-simulate with the option disabled.
See .OPTION NONWRMOS in the Eldo Reference Manual.
• Optimize the density of time points.
Is not always possible to directly alter the density of time points that the simulator must
compute to maintain a given accuracy. However, it is highly recommended to
familiarize yourself with some of the options that affect the number of time points; the
OUT_STEP, INTERP, FREQSMP, and OUT_RESOL options might have very
Eldo® User's Manual, 15.3 1257