eldo_user

Speed and Accuracy
Newton Iterations Accuracy Control
Related Options
• .OPTION FT in the Eldo Reference Manual
• .OPTION HACC in the Eldo Reference Manual
• .OPTION HMAX, .OPTION HMIN and .OPTION ABSOLUTE_HMIN in the Eldo
Reference Manual
Related Topics
Overview of Time Step Control Algorithms
Usage of a Fixed Time Step
Usage of a Fixed Time Step
A fixed internal time step can be specified by the STEP parameter; this may be useful when
simulating certain classes of circuit (for example switched-capacitor circuits), however, care
must be taken. Overall, it is not safe, and may cause excessively long simulation times.
If the requested STEP value is unreasonably small, it may appear to the simulator that some
nodes are not changing, and as a result it will set them into ‘latency’. A badly chosen fixed time
step can thus sometimes have unwelcome results.
A STEP value that is too large may similarly cause problems. Consider a bipolar circuit when a
large transition of an input signal occurs between two steps. This will be nearly impossible to
handle for the simulator.
Overall, using this option in the case of regular IC circuit analysis is highly discouraged.
Related Topics
Overview of Time Step Control Algorithms
More About Time Step Control
Newton Iterations Accuracy Control
The main parameters controlling the accuracy of the Newton iterations are RELTOL, VNTOL,
ABSTOL, and CHGTOL.
Whenever Newton iterations are used to solve the non-linear system of equations, the following
convergence criteria for voltages, currents and charges are used:
• For node voltages:
|V(i) − V(i − 1)| < RELTOL × |max(|V(i)|, |V(i − 1)|)| + VNTOL
1252
Eldo® User's Manual, 15.3