AMSV Newsletter 2015

A Digital Low-Dropout Regulator with Coarse-Fine-Tuning and
Burst-Mode Operation
Mo Huang, Yan Lu, Sai-Weng Sin, Seng-Pan U, and Rui P. Martins
In TCAS-II 2016
[Accepted in 2015]
From Integrated Power research line
Motivation
Digital low-dropout (D-LDO) regulator, that replaces the
power transistor in analog LDO regulator with a power
switch array, has recently drawn significant attention for
its low operation voltage and process scalability feature.
However, for a conventional shift register based D-LDO,
only one PMOS is turned on/off per clock cycle for the
shift register operation; and the transient speed can only
be improved by increasing sampling frequency which
degrades the power consumption. To address this issue,
a wide load range D-LDO regulator with coarse-fine tuning
and burst-mode techniques is proposed for fast transient
response and low quiescent current.
Architecture
For the proposed topology, the PMOS arrays consist of one
coarse section and one fine section, driven by separate shift
registers. To extend the load current range, the coarse
PMOS array is designed to be with 64 power switches. The
unit size of the coarse PMOS is designed to be 16 times of
that of the fine PMOS for the loop gain boosting. To cover
the current gap between two adjacent coarse bits can provide,
the fine PMOS array is designed with 32 units for sufficient
margin. Once the voltage undershoot/overshoot is
detected, the coarse-tuning quickly finds out the coarse control
word in which the load current should be located, with
large power MOS strength and high sampling frequency for
a fixed duration. Then, the fine-tuning with reduced power
MOS strength and sampling frequency takes over the
steady-state operation for high accuracy and current efficiency.
Implementation
Verification
The proposed D-LDO regulator was fabricated in a 65-nm
CMOS process.