Deliverables and Services - IHP Microelectronics

More documents

Recommendations

Info

28 A n n u A l R e p o R t 2 0 0 9 A N G e B o t e u N d L e I S t u N G e N – d e L I V e r A B L e S A N d S e r V I C e S CMoS and passives of 0.25 µm and 0.13 µm technologies parameter SG25H1 / H3* SG13B / 13S SG13S CMoS Section Core Supply Voltage 2.5 V 3.3 V 1.2 V nMoS V th 0.6 V 0.65 V 0.49 V I Dsat 540 µA / µm 520 µA / µm 500 µA / µm I off 3 pA / µm 10 pA / µm 500 pA / µm pMoS V th - 0.56 V - 0.61 V - 0.42 V I Dsat - 230 µA / µm - 220 µA / µm - 210 µA / µm I off - 3 pA / µm - 10 pA / µm - 500 pA / µm passives MIM Capacitor 1 fF / µm 2 1.5 fF / µm 2 1.5 fF / µm 2 n + poly Resistor 210 Ω / - - p + poly Resistor 280 Ω / 345 Ω / 345 Ω / High poly Resistor 1600 Ω / 775 Ω / 775 Ω / Varactor C max / C min 3 tbd. tbd. Inductor Q@5.8 GHz (with tM2) 18 (1 nH) 18 (1 nH) 18 (1 nH) Inductor Q@10 GHz (with tM2) 20 (1 nH) 20 (1 nH) 20 (1 nH) *parameters for SGB25V are similar . 0. µm SiGe BiCMOS (SG S, SG B) parameter npn13p npn13V Bipolar Section (SG13S, SG13B) A e 0.12 x 0.48 µm 2 0.18 x 1.02 µm 2 peak f max 300 GHz 120 GHz peak f t 250 GHz 45 GHz BV Ceo 1.7 V 5.0 V BV CBo 5.0 V 16 V β 900 600
Design Kits A N G e B o t e u N d L e I S t u N G e N – d e L I V e r A B L e S A N d S e r V I C e S Die Design Kits unterstützen eine Cadence Mischsignal- Plattform: - Design Framework II (Cadence 5.14 / 6.1) - Verhaltens-Beschreibung (Verilog HDL) - Logische Synthese & Optimierung (VHDL / HDL Compiler, Design Compiler / Synopsys, Power Compiler / Synopsys) - Test Generation / Synthetisierer / Test Compiler (Synopsys) - Simulation (RF: SpectreRF, Analog: SpectreS, Verhaltens-Beschreibung / Digital: Leapfrog / NC- Affirma / Verilog-XL / ModelSim) - Platzieren & Verbinden (Silicon Ensemble & Preview) - Layout (Virtuoso Editor-Cadence) - Verifizierung (Diva and Assura: DRC / LVS / Extract / Parasitic Extraction) - ADS-Support über Golden Date / RFIC mit dynamischem Link zu Cadence ist verfügbar - Eigenständiges ADS Kit einschließlich Momentum Substrate Layer File - ADS Layout-Unterstützung in SG25H3 - Unterstützung von Analog Office und Tanner über Partner - ECL-Bibliothek für SGB25V - Strahlungsresistente CMOS-Bibliothek Verfügbare analoge und digitale Blöcke und Designs für die drahtlose und Breitbandkommunikation Zur Unterstützung von Designs bietet das IHP Schaltungsblöcke und Schaltungen für Lösungen im Bereich drahtlose und Breitbandkommunikation an: - Integrierter 122 GHz Empfänger - 77-81 GHz SiGe Radar Frontend und Frontend- Komponenten (VCO, PA, Mischer, Frequenzteiler) - Komplette 60-GHz-Transceiver und -Komponenten - 40 to 70 GHz analoger und digitaler Phasenschieber - 60 GHz planare PCB-integrierte Antenne - SiGe Mischer, VCOs, Prescaler, VCO-Prescaler für 24 GHz - SiGe DAC-Komponenten für mittlere und hohe Geschwindigkeiten bis zu 30 GSps - SiGe UWB Transceiver-Komponenten wie Mischer- Korrelator und Breitband-LNA design Kits the design kits support a Cadence mixed signal platform: - Design Framework II (Cadence 5.14 / 6.1) - Behavioral Modeling (Verilog HDl) - logic Synthesis & optimization (VHDl / HDl Compiler, Design Compiler / Synopsys, power Compiler / Synopsys) - test Generation / Synthesizer / test Compiler (Synopsys) - Simulation (RF: SpectreRF, Analog: SpectreS, Behavioral / Digital: leapfrog / nC-Affirma / Verilog-Xl / ModelSim) - place & Route (Silicon ensemble & preview) - layout (Virtuoso editor-Cadence) - Verification (Diva and Assura: DRC / lVS / extract / parasitic extraction) - ADS-support via Golden Gate / RFIC dynamic link to Cadence is available - Standalone ADS Kit including Momentum substrate layer file - ADS layout support in SG25H3 - Support of Analog office, texeDA, and tanner via partners is available - eCl library for SGB25V - Radiation hard CMoS library for SGB25V Available Analog and digital Blocks and designs for wireless and Broadband Communications to support designs, IHp offers a wide range of blocks and designs for wireless & broadband solutions: - Integrated 122 GHz Receiver - 77-81 GHz SiGe radar frontend and frontend components (VCo, pA, mixer, frequency divider) - Complete 60 GHz transceiver and components in SiGe BiCMoS - 40 to 70 GHz analog and digital phase shifters - 60 GHz planar pDB-integrated antenna - 24 GHz SiGe mixers, VCos, prescaler, VCo-prescaler - SiGe DAC components for medium and high speed up to 30 GSps - SiGe uWB transceiver components such as mixer correlator, broadband lnA A n n u A l R e p o R t 2 0 0 9 29
Page 1 and 2:
Annual Report 2009 A n n u A l R e
Page 3 and 4:
Die Forschungsarbeiten des IHP erm
Page 5 and 6:
I N H A L t S V e r Z e I C H N I S
Page 8 and 9:
8 A n n u A l R e p o R t 2 0 0 9 F
Page 10 and 11:
Die Forschungsprogramme haben die f
Page 12 and 13:
Technologieplattform für drahtlose
Page 14 and 15:
A n n u A l R e p o R t 2 0 0 9 d A
Page 16 and 17:
Wissenschaftliche Ergebnisse Im Fol
Page 18 and 19:
Ein erster sicherer Knoten für dra
Page 20 and 21:
In Zusammenarbeit mit ESA und DLR w
Page 22 and 23:
integrierten Wellenleitern konnten
Page 24 and 25:
sind in der Automobilelektronik ein
Page 26 and 27:
DFG Cluster - Antrag unter Beteilig
Page 28 and 29:
28 A n n u A l R e p o R t 2 0 0 9
Page 30 and 31:
Abb. 1: Die Architektur des MAC-Pro
Page 32 and 33:
GALS-Interface für die Integration
Page 34 and 35:
A n n u A l R e p o R t 2 0 0 9 A u
Page 36 and 37:
6 A n n u A l R e p o R t 2 0 0 9 A
Page 38 and 39:
TANDEM IR-UWB Kommunikation für dr
Page 40 and 41:
122 GHz Empfänger in SiGe 0 A n n
Page 42 and 43:
Strahlungsfester Frequenzsynthesize
Page 44 and 45:
4 Bit, 16 GS /s Analog-Digital-Umse
Page 46 and 47:
0,13-µm-BiCMOS-Technologie 6 A n n
Page 48 and 49:
RF-MEMS Integration 8 A n n u A l R
Page 50 and 51:
0 A n n u A l R e p o R t 2 0 0 9 A
Page 52 and 53:
2 A n n u A l R e p o R t 2 0 0 9 A
Page 54 and 55:
A n n u A l R e p o R t 2 0 0 9 A u
Page 56 and 57:
TiN/HfO 2 /Ti/TiN MIM Strukturen f
Page 58 and 59:
8 A n n u A l R e p o R t 2 0 0 9 A
Page 60 and 61:
60 A n n u A l R e p o R t 2 0 0 9
Page 62 and 63:
62 A n n u A l R e p o R t 2 0 0 9
Page 64 and 65:
6 A n n u A l R e p o R t 2 0 0 9 G
Page 66 and 67:
wurden mit dem Schlussbericht erfol
Page 68 and 69:
Gemeinsames Labor IHP/TH Wildau (FH
Page 70 and 71:
70 A n n u A l R e p o R t 2 0 0 9
Page 72 and 73:
72 A n n u A l R e p o R t 2 0 0 9
Page 74 and 75:
G A S t w I S S e N S C H A F t L e
Page 76 and 77:
G A S t w I S S e N S C H A F t L e
Page 78 and 79: 78 A n n u A l R e p o R t 2 0 0 9
Page 84 and 85: 8 A n n u A l R e p o R t 2 0 0 9 e
Page 100 and 101: (107) A 0.13 µm SiGe BiCMoS techno
Page 102 and 103: Eingeladene Vorträge Invited prese
Page 106 and 107: Vorträge presentations (1) Formati
Page 108 and 109: (21) on prolonging Sensornode Gataw
Page 110 and 111: (42) Lateral Inductive Coupling for
Page 112 and 113: (63) evaluation Criteria for effici
Page 114 and 115: (86) Si / Sio 2 MQw Stacks for 3 rd
Page 116 and 117: (105) Highly robust X-Band LNA with
Page 118 and 119: (124) electronic States of oxygen-f
Page 120 and 121: Monographien Monographs (1) Short-r
Page 122 and 123: (15) robuste Synchronisation für e
Page 124 and 125: 2 A n n u A l R e p o R t 2 0 0 9 A
Page 130 and 131: 0 A n n u A l R e p o R t 2 0 0 9 A
Page 132 and 133: Wegbeschreibung zum IHP 2 A n n u A
Page 134: A n n u A l R e p o R t 2 0 0 9 IHP
show all

Deliverables and Services - IHP Microelectronics

Create successful ePaper yourself

Delete template?

Save as template?