Advanced Configuration and Power Interface Specification

ACPI Platform Error Interfaces (APEI)
18.5.2.4.2 Error Log Address Range Resides in (volatile) RAM
In this implementation, the Error Log Address Range describes an intermediate location for error
records. To persist a record, OSPM copies the record into the Error Log Address Range and sets the
Execute, at which time the platform runs necessary code (SMM code on non-UEFI based systems
and UEFI runtime code on UEFI-enabled systems) to transfer the error record from main memory to
some persistent store. To read a record, OSPM asks the platform to copy a record from the persistent
store to a specified offset within the Error Log Address Range. The size of the Error Log Address
Range is at least large enough for one error record.
18.5.2.4.3 Error Log Address Range Resides on Service Processor
In this type of implementation, the Error Log Address Range is really MMIO. When OSPM writes
an error record to the Error Log Address Range, it is really writing to memory on a service
processor. When the OSPM sets the Execute control bit, the platform knows that the OSPM is done
writing the record and can do something with it, like move it into a permanent location (i.e. hard
disk) on the service processor. The size of the persistent store in this type of implementation is
typically large enough for one error record.
18.5.2.4.4 Error Log Address Range is Copied Across Network
In this type of implementation, the Error Log Address Range is an intermediate cache for error
records. To persist an error record, OSPM copies the record into the Error Log Address Range and
set the Execute control bit, and the platform runs code to transmit this error record over the wire. The
size of the Error Log Address Range in this type of implementation is typically large enough for one
error record.
18.6 Error Injection
This section outlines an ACPI table mechanism, called EINJ, which allows for a generic interface
mechanism through which OSPM can inject hardware errors to the platform without requiring
platform specific OSPM level software. The primary goal of this mechanism is to support testing of
OSPM error handling stack by enabling the injection of hardware errors. Through this capability
OSPM is able to implement a simple interface for diagnostic and validation of errors handling on the
system.
18.6.1 Error Injection Table (EINJ)
The Error Injection Table provides a generic interface mechanism through which OSPM can inject
hardware errors to the platform without requiring platform specific OSPM software. System
firmware is responsible for building this table, which is made up of Injection Instruction entries.
Table 18-340 details the layout of the table.
Table 18-340 Error Injection Table (EINJ)
Field
Byte
length
Byte
offset
Description
ACPI Standard Header
Header Signature 4 0 EINJ. Signature for the Error Record Injection Table.
Version 6.0 741