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Advanced Configuration and Power Interface Specification

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ACPI Platform Error <strong>Interface</strong>s (APEI)<br />

Field<br />

Function 2 22 Identifies the PCI Function number of the root port.<br />

If the GLOBAL flag is specified, this field is ignored.<br />

Device Control 2 24 Device control bits with which to initialize the device.<br />

Reserved 2 26 Must be zero.<br />

Uncorrectable Error 4 28 Value to write to the root port’s Uncorrectable Error Mask register.<br />

Mask<br />

Uncorrectable Error<br />

Severity<br />

Correctable Error<br />

Mask<br />

<strong>Advanced</strong> Error<br />

Capabilities <strong>and</strong><br />

Control<br />

Root Error<br />

Comm<strong>and</strong><br />

Byte<br />

Length<br />

Byte<br />

Offset<br />

Description<br />

4 32 Value to write to the root port’s Uncorrectable Error Severity<br />

register.<br />

4 36 Value to write to the root port’s Correctable Error Mask register.<br />

4 40 Value to write to the root port’s <strong>Advanced</strong> Error Capabilities <strong>and</strong><br />

Control Register.<br />

4 44 Value to write to the root port’s Root Error Comm<strong>and</strong> Register.<br />

18.3.2.4 PCI Express Device AER Structure<br />

PCI Express devices may implement AER support. This table contains information platform<br />

firmware supplies to OSPM for configuring AER support on a given PCI Express device.<br />

The HEST may contain one entry of this type for each PCI Express endpoint device if none of the<br />

entries has the GLOBAL flag set. If the GLOBAL flag is set, there may only be one entry of this<br />

type <strong>and</strong> the information contained in that entry will be applied to all PCI Express endpoint devices.<br />

Table 18-327 PCI Express Device AER Structure<br />

Field<br />

Byte<br />

Length<br />

Byte<br />

Offset<br />

Description<br />

Type 2 0 7 – AER Endpoint.<br />

Source Id 2 2 Uniquely identifies the error source.<br />

Reserved 2 4 Reserved.<br />

Flags 1 6 Bit [0] - FIRMWARE_FIRST: If set, indicates that system<br />

firmware will h<strong>and</strong>le errors from this source first.<br />

Bit [1] – GLOBAL: If set, indicates that the settings contained in<br />

this structure apply globally to all PCI Express Devices.<br />

All other bits must be set to zero.<br />

Enabled 1 7 If the field value is 1, indicates this error source is to be enabled.<br />

If the field value is 0, indicates that the error source is not to be<br />

enabled.<br />

If FIRMWARE_FIRST is set in the flags field, the Enabled field is<br />

ignored by the OSPM.<br />

Number of Records<br />

To Pre-allocate<br />

4 8 Indicates the number of error records to pre-allocate for this error<br />

source. Must be >= 1.<br />

Version 6.0 721

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