Advanced Configuration and Power Interface Specification

Advanced Configuration and Power Interface Specification
specific reason for the alarm message, such that OSPM can take actions. Once an alarm message has
been received, the SMB-HC will not receive additional alarm messages until the ALRM status bit is
cleared.
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
DATA (D7:D0)
Where:
DATA:
Data byte received in alarm message.
The alarm address and alarm data registers are not read by OSPM until the alarm status bit is set.
OSPM driver then reads the 3 bytes, and clears the alarm status bit to indicate that the alarm registers
are now available for the next event.
12.9.2 Protocol Description
This section describes how to initiate the different protocols on the SMBus through the interface
described in Section 12.9.1, “Register Descriptions.” The registers should all be written with the
appropriate values before writing the protocol value that starts the SMBus transaction. All
transactions can be completed in one pass.
12.9.2.1 Write Quick
Data Sent:
SMB_ADDR:
SMB_PRTCL:
Address of SMBus device.
Write 0x02 to initiate the write quick protocol.
Data Returned:
SMB_STS:
SMB_PRTCL:
Status code for transaction.
0x00 to indicate command completion.
12.9.2.2Read Quick
Data Sent:
SMB_ADDR:
SMB_PRTCL:
Address of SMBus device.
Write 0x03 to initiate the read quick protocol.
650 April, 2015 Version 6.0