Advanced Configuration and Power Interface Specification

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Advanced Configuration and Power Interface Specification long as the microcontroller conforms to one of the models described in this section. The embedded controller is a unique feature in that it can perform complex low-level functions through a simple interface to the host microprocessor(s). Although there is a large variety of microcontrollers in the market today, the most commonly used embedded controllers include a host interface that connects the embedded controller to the host data bus, allowing bi-directional communications. A bi-directional interrupt scheme reduces the host processor latency in communicating with the embedded controller. Currently, the most common host interface architecture incorporated into microcontrollers is modeled after the standard IA-PC architecture keyboard controller. This keyboard controller is accessed at 0x60 and 0x64 in system I/O space. Port 0x60 is termed the data register, and allows bidirectional data transfers to and from the host and embedded controller. Port 0x64 is termed the command/status register; it returns port status information upon a read, and generates a command sequence to the embedded controller upon a write. This same class of controllers also includes a second decode range that shares the same properties as the keyboard interface by having a command/status register and a data register. The following diagram graphically depicts this interface. COMMAND WRITE (SMI/SCI) DATA WRITE (SMI/SCI) DATA READ (SMI/SCI) STATUS READ (SMI/SCI) EC INPUT BUFFER EC OUTPUT BUFFER EC STATUS REGISTER INTERFACE ARBITRATION CODE SMI INTERFACE CODE SCI INTERFACE CODE MAIN FIRMWARE I/O EC_SMI_STS EC_SMI EC_SCI_STS EC_SMI_EN EC_SCI EC_SCI_EN Figure 12-70 Shared Interface The diagram above depicts the general register model supported by the ACPI Embedded Controller Interface. 636 April, 2015 Version 6.0
ACPI Embedded Controller Interface Specification The first method uses an embedded controller interface shared between OSPM and the system management code, which requires the Global Lock semaphore overhead to arbitrate ownership. The second method is a dedicated embedded controller decode range for sole use by OSPM driver. The following diagram illustrates the embedded controller architecture that includes a dedicated ACPI interface. EC_SMI_STS EC_SMI EC_SMI_EN COMMAND WRITE (SMI) DATA WRITE (SMI) SMI INPUT BUFFER DATA READ (SMI) SMI OUTPUT BUFFER SMI INTERFACE CODE STATUS READ (SMI) COMMAND WRITE (SCI) DATA WRITE (SCI) SMI STATUS REGISTER SCI INPUT BUFFER MAIN FIRMWARE I/O DATA READ (SCI) SCI OUTPUT BUFFER SCI INTERFACE CODE STATUS READ (SCI) SCI STATUS REGISTER EC_SCI_STS EC_SCI Figure 12-71 Private Interface EC_SCI_EN Version 6.0 637
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Advanced Configuration and Power In
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Revision History Revision Change De
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Contents 1 2 Introduction........
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5 ACPI Software Programming Model
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7 6.3.6 _RMV (Remove) ............
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9.2.5 _ALR (Ambient Light Response)
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11.2.1 Evaluating Thermal Device Li
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14.1.3 Generic Communications Subsp
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19.6.10 Buffer (Declare Buffer Obje
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19.6.102 Processor (Declare Process
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A.4.1 Power State Definitions......
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Tables Table 1-1 Hardware Type vs.
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Table 5-91 Power state Values .....
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Table 6-184 Device Insertion, Remov
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Table 10-275 Control Method Battery
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Table 19-367 Field Unit list entire
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Figures Figure 1-1 OSPM/ACPI Global
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Introduction 1 Introduction The Adv
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Introduction wake and answer the te
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Introduction Figure 1-1 OSPM/ACPI G
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Introduction specified below are ge
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Introduction ACPI System Descriptio
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Introduction • Support the ACPI E
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Introduction 1.9.2 Programming Mode
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Introduction 1.10 Related Documents
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Definition of Terms 2 Definition of
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Definition of Terms of power manage
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Definition of Terms I/O SAPIC An In
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Definition of Terms loaded. This al
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Definition of Terms varies on the w
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Definition of Terms in shallower po
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Definition of Terms state to allow
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ACPI Overview 3 ACPI Overview Platf
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ACPI Overview component to avoid da
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ACPI Overview Aspects of mobile PC
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ACPI Overview level, platform-speci
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ACPI Overview through their own bus
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ACPI Overview the SCI status bit ma
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ACPI Overview wait for the call. To
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ACPI Overview Each device enumerate
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ACPI Overview the battery is able t
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ACPI Overview Table 3-4 Level Warni
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ACPI Overview necessary. Figure 3-8
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ACPI Overview 3.11.1 Hardware-reduc
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ACPI Overview Low Power S0 Idle Cap
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ACPI Hardware Specification 4 ACPI
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ACPI Hardware Specification would b
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ACPI Hardware Specification OSPM re
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ACPI Hardware Specification SLP_ENx
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ACPI Hardware Specification Device
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ACPI Hardware Specification Generic
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ACPI Hardware Specification Feature
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ACPI Hardware Specification Registe
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ACPI Hardware Specification Table 4
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ACPI Hardware Specification purpose
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ACPI Software Programming Model 5 A
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ACPI Software Programming Model The
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ACPI Software Programming Model ACP
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ACPI Software Programming Model 5.2
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Device Configuration 6 Device Confi
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Device Configuration BUS PCMCIA PC
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Device Configuration Device(SATA) /
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Device Configuration Return Value I
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Device Configuration unable to dete
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Device Configuration Name Definitio
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Device Configuration Name Definitio
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Device Configuration Rota-tion Goup
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Device Configuration Example ASL: N
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Device Configuration Object _FIX _G
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Device Configuration For example, i
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Device Configuration 6.2.5 _DSD (De
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Device Configuration } Name (_DSD,
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Device Configuration APIC Device”
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Device Configuration Scope(\_SB) {
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Device Configuration Method(_EJ0, 1
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Device Configuration Field Object T
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Device Configuration Field Object T
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Device Configuration other governin
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Device Configuration Since platform
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Device Configuration Section 8.4.4.
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Device Configuration Control Field
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Device Configuration Device(PCI0) /
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Device Configuration Field Type Des
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Device Configuration This optional
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Device Configuration Field Byte Len
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Device Configuration If a device in
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Device Configuration are present, w
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Device Configuration Arguments: Non
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Device Configuration Return Value:
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Device Configuration Table 6-187 Op
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Device Configuration User interacts
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Device Configuration Method(_EJ0, 1
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Device Configuration 6.4.2 Small Re
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Device Configuration Offset Field N
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Device Configuration Table 6-197 I/
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Device Configuration 6.4.2.9 End Ta
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Device Configuration Offset Byte 11
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Device Configuration To specify mul
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Device Configuration 6.5 Other Obje
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Device Configuration Note: If the m
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Device Configuration Note: The OS o
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Device Configuration whether the Gl
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Power and Performance Management 7
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Power and Performance Management No
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Power and Performance Management Re
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Power and Performance Management Ob
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Power and Performance Management Ar
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Power and Performance Management ca
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Power and Performance Management
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Power and Performance Management im
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Power and Performance Management 9.
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Processor Configuration and Control
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System Address Map Interfaces 15.3
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System Address Map Interfaces Base
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Waking and Sleeping 16 Waking and S
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Waking and Sleeping 16.1 Sleeping S
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Waking and Sleeping synchronized wi
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Waking and Sleeping 3. Removing pow
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Waking and Sleeping The _TTS contro
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Waking and Sleeping CLI instruction
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Waking and Sleeping For this exampl
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Waking and Sleeping If an NVS image
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Platforms Non-Uniform Memory Access
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Platforms Non-Uniform Memory Access
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Appendix A Device Class Specificati
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• PCI Bus Power Management Capabi
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A.4.1 Power State Definitions State
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A.5.1 Power State Definitions State
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power transitions and power managem
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State Status Definition D2 N/A This
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The most common modem type is an IS
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State Status Definition D1 Optional
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A floppy disk and IDE channel devic
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GPE // ACPI General-purpose HW even
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the next boot, a 1 indicates a PCI
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Value 0x84 Description Previous Dis
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Bits Definition 31 0 - Don’t do a
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internal data structure of the OS t
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centenary value, RTC alarm 83 Centr
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power resource objects 398 D2 Devic
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Eject Device List (_EDL) object 332
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features 68 functional implementati
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I/O resource flag 366 I/O SAPIC def
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logic fixed power button 77 lid swi
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objects _ BMC (Battery Maintenance
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transitioning working to soft-off s
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power resources battery management
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definition 22 table fields 115 RTC_
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protocols 650, 662, 669 Read/Write
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top of memory 704 ToString (Convert
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