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Advanced Configuration and Power Interface Specification

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<strong>Advanced</strong> <strong>Configuration</strong> <strong>and</strong> <strong>Power</strong> <strong>Interface</strong> <strong>Specification</strong><br />

8.4.7.1.1.3 Reference Performance<br />

Optional<br />

Register or DWORD<br />

Register Location: PCC or Functional Fixed Hardware<br />

Attribute:<br />

Read<br />

Size:<br />

8-32 bits<br />

If supported by the platform, Reference Performance is the rate at which the Reference<br />

Performance Counter increments. If not implemented (or zero), the Reference Performance Counter<br />

increments at a rate corresponding to the Nominal Performance level.<br />

8.4.7.1.1.4 Lowest Nonlinear Performance<br />

Register or DWORD<br />

Register Location:<br />

Attribute:<br />

Size:<br />

PCC or Functional Fixed Hardware<br />

Read<br />

8-32 bits<br />

Lowest Nonlinear Performance is the lowest performance level at which nonlinear power savings<br />

are achieved, for example, due to the combined effects of voltage <strong>and</strong> frequency scaling. Above this<br />

threshold, lower performance levels should be generally more energy efficient than higher<br />

performance levels. In traditional terms, this represents the P-state range of performance levels.<br />

This register effectively conveys the most efficient performance level to OSPM.<br />

8.4.7.1.1.5 Lowest Performance<br />

Register or DWORD<br />

Register Location:<br />

Attribute:<br />

Size:<br />

PCC or Functional Fixed Hardware<br />

Read<br />

8-32 bits<br />

Lowest Performance is the absolute lowest performance level of the platform. Selecting a<br />

performance level lower than the lowest nonlinear performance level may actually cause an<br />

efficiency penalty, but should reduce the instantaneous power consumption of the processor. In<br />

traditional terms, this represents the T-state range of performance levels.<br />

8.4.7.1.1.6 Guaranteed Performance Register<br />

Optional<br />

Register Location:<br />

Attribute:<br />

Size:<br />

PCC or Functional Fixed Hardware<br />

Read<br />

8-32 bits<br />

Guaranteed Performance Register conveys to OSPM a Guaranteed Performance level, which is<br />

the current maximum sustained performance level of a processor, taking into account all known<br />

external constraints (power budgeting, thermal constraints, AC vs DC power source, etc.). All<br />

processors are expected to be able to sustain their guaranteed performance levels simultaneously.<br />

The guaranteed performance level is required to fall in the range [Lowest Performance, Nominal<br />

performance], inclusive.<br />

If this register is not implemented, <strong>and</strong> Autonomous Selection is not enabled, OSPM assumes<br />

guaranteed performance is always equal to nominal performance.<br />

Notify events of type 0x83 to the processor device object will cause OSPM to re-evaluate the<br />

Guaranteed Performance Register. Changes to guaranteed performance should not be more frequent<br />

than once per second. If the platform is not able to guarantee a given performance level for a<br />

482 April, 2015 Version 6.0

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