Advanced Configuration and Power Interface Specification

Advanced Configuration and Power Interface Specification
Element
CPPC EnableRegister Buffer Optional. If supported, contains a resource descriptor with a single
Register() descriptor that describes a register to which OSPM writes a
One to enable CPPC on this processor. Before this register is set, the
processor will be controlled by legacy mechanisms (ACPI P-states,
firmware, etc.).
Autonomous Selection
Enable
AutonomousActivityWi
ndowRegister
EnergyPerformancePr
eferenceRegister
Reference
Performance
Object
Type
Integer
(DWORD)
or Buffer
Buffer
Buffer
Integer
(DWORD)
or Buffer
Description
Optional. If supported, contains a resource descriptor with a single
Register() descriptor that describes a register to which OSPM writes a
One to enable autonomous performance level selection. Platforms
that exclusively support Autonomous Selection must populate this
field as an Integer with a value of 1.
Optional. If supported, contains a resource descriptor with a single
Register() descriptor that describes a register to which OSPM writes a
time value that indicates a moving utilization sensitivity window for the
autonomous selection policy.
Optional. If supported, contains a resource descriptor with a single
Register() descriptor that describes a register to which OSPM writes a
value to control the Energy vs. Performance preference of the
platform's energy efficiency and performance optimization policies
when Autonomous Selection is enabled
Optional. If supported, indicates the performance level at which the
Reference Performance Counter accumulates. If not supported, The
Reference Performance Counter accumulates at the Nominal
performance level. If this element is an Integer, OSPM reads the
integer value directly. If this element is a Buffer (and supported), it
must contain a Resource Descriptor with a single Register() to read
the value from
The _CPC object provides OSPM with platform-specific performance capabilities / thresholds and
control registers that OSPM uses to control the platform’s processor performance settings. These are
described in the following sections. While the platform may specify register sizes within an
allowable range, the size of the capabilities / thresholds registers must be compatible with the size of
the control registers. If the platform supports CPPC, the _CPC object must exist under all processor
objects. That is, OSPM is not expected to support mixed mode (CPPC & legacy PSS, _PCT, _PPC)
operation.
8.4.7.1.1 Performance Capabilities / Thresholds
Performance-based controls operate on a continuous range of processor performance levels, not
discrete processor states. As a result, platform capabilities and OSPM requests are specified in terms
of performance thresholds. Figure 8-49 outlines the static performance thresholds of the platform
and the dynamic guaranteed performance threshold.
480 April, 2015 Version 6.0