Advanced Configuration and Power Interface Specification

Processor Configuration and Control
need to stay in the idle state to overcome the energy cost of transitioning in/out, and make choosing
that state a net win relative to shallower alternatives? Note that this also includes comparing against
not entering an idle state and keeping the node running. This is illustrated in Figure 8-48 which
shows the energy associated with three different state choices as a function of the sleep duration.
Note that State A’s MR relative to keeping the node running is not pictured.
Generally minimum residency and worst case wakeup latency will be larger for deeper states,
however this may not always be the case. Taking a different example to the above, consider two
system level states, StateY and StateZ, with similar entry overhead but where StateZ saves more
power than StateY. An abstract state list might look like:
StateX: MR = 100 us
StateY: MR = 1000 us
StateZ: MR = 800 us, power resource A must be OFF
From an energy perspective, StateZ is always preferred, but in this example, StateZ is only available
when certain device dependencies are met. This makes StateY attractive when the dependencies
cannot be met. Despite being the deeper (lower power) state, StateZ has a lower MR than StateY
since the entry overheads are similar and StateZ’s lower power more quickly amortizes the transition
cost. Although the crossover, which sets MR, should generally be versus the next shallowest state,
MR is defined relative to any shallower (higher power) state to deal with cases like this. In this case,
StateZ’s MR is set by the crossover with StateX since StateZ (if allowed based on device
dependencies) is always preferred to StateY. To achieve the lowest energy, OSPM must select the
deepest (lowest power) state for which all entry constraints are satisfied and should not assume that
deeper states are not viable just because a shallower state’s WCWL/MR threshold was not met.
Since WCWL may be used by OSPM to restrict idle state selection and guarantee response times to
critical interrupts, it should be set conservatively (erring on the high side) so that OSPM is not
surprised with worse than specified interrupt response time. On the other hand, MR helps OSPM
make efficient decisions. If MR is inaccurate in a certain scenario and OSPM chooses a state which
is deeper or shallower than optimal for a particular idle period, there may be some wasted energy but
the system will not be functionally broken. This is not to say that MR doesn’t matter –energy
efficiency is important – just that the platform may choose to optimize MR based on the typical case
rather than the worst case.
8.4.4.3.3.1 Minimum Residency and Worst Case Wakeup Latency Combination Across Hierarchy
Levels
The WCWL in _LPI is for a particular local state. When evaluating composite state choices versus
system latency tolerance as part of idle state selection, OSPM will add wakeup latencies across
hierarchy levels. For example, if a system has core powerdown with WCWL = 50 us and cluster
powerdown with WCWL = 20 us then the core powerdown + cluster powerdown composite state
latency is calculated as 70 us.
MRs defined in _LPI apply to a particular hierarchy node. The implicit assumption is that each
hierarchy node represents an independent power manageable domain and can be considered
separately. For example, assume that a cluster retention state is legal if the underlying cores are in
core powerdown or core retention. The MR for cluster retention is based on the energy cost of taking
shared logic outside of the cores in and out of retention versus the steady state power savings
achieved in that shared logic while in that state. The key is that the specific state chosen at the core
level does not fundamentally affect the cluster level decision since it is tied to properties of shared
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