Advanced Configuration and Power Interface Specification

Processor Configuration and Control
Each LPI sub-Package contains the elements described below:
Package() {
Min Residency,
// Integer (DWORD)
Worst case wakeup latency, // Integer (DWORD)
Flags,
// Integer (DWORD)
Arch. Context Lost Flags, // Integer (DWORD)
Residency Counter Frequency, // Integer (DWORD)
Enabled Parent State, // Integer (DWORD)
Entry Method,
// Buffer (ResourceDescriptor) or
// Integer (QWORD)
Residency Counter Register // Buffer (ResourceDescriptor)
Usage Counter Register // Buffer (ResourceDescriptor)
State Name
// String (ASCIIZ)
}
Table 8-240 Extended LPI fields
Element Object Type Description
Min Residency Integer (DWORD) Minimum Residency – time in microseconds after which a state
becomes more energy efficient than any shallower state. See
Section 8.4.4.3.3.
Worst case
wakeup latency
Flags
Arch. Context
Lost Flags
Residency
Counter
Frequency
Enabled Parent
State
Entry Method
Integer (DWORD)
Integer
(DWORD)
Integer
(DWORD)
Integer
(DWORD)
Integer
(DWORD)
Buffer or Integer
(QWORD)
Worst case time in microseconds from a wake interrupt being
asserted to the return to a running state of the owning hierarchy
node (processor or processor container). See Section 8.4.4.3.3.
Valid flags are described in Table 8-241
Architecture specific context loss flags. These flags may be
used by a processor architecture to indicate processor context
that may be lost by the power state and must be handled by
OSPM. See Section 8.4.4.3.5 “Architecture Specific Context
Loss Flags” for more detail.
Residency counter frequency in cycles-per-second (Hz). Value
0 indicates that counter runs at an architectural-specific
frequency.
Valid only if a Residency Counter Register is defined.
Index to deepest local power state of the parent processor
container _LPI that this state enables. Every shallower power
state in the parent is also enabled. 0 implies that no local idle
states may be entered at the parent node.
This may contain a resource descriptor or an integer
A Resource Descriptor with a single Register() descriptor may
be used to describe the register that must be read in order to
enter the power state.
Alternatively, an integer may be provided in which case the
integer would be used in composing the final Register Value
that must be used to enter this state. This composition process
is described below in Section 8.4.4.3.4 “Entry Method and
Composition”
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