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Advanced Configuration and Power Interface Specification

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<strong>Advanced</strong> <strong>Configuration</strong> <strong>and</strong> <strong>Power</strong> <strong>Interface</strong> <strong>Specification</strong><br />

/*<br />

* Intel Architecture SetSleepingState example<br />

*/<br />

ULONG<br />

SetSystemSleeping (<br />

IN ULONG NewState<br />

)<br />

{<br />

PROCESSOR_CONTEXT Context;<br />

ULONG<br />

<strong>Power</strong>Seqeunce;<br />

BOOLEAN<br />

FlushCaches;<br />

USHORT<br />

SlpTyp;<br />

// Required environment: Executing on the system boot<br />

// processor. All other processors stopped. Interrupts<br />

// disabled. All <strong>Power</strong> Resources (<strong>and</strong> devices) are in<br />

// corresponding device state to support NewState.<br />

// Get h/w attributes for this system state<br />

FlushCaches = SleepType[NewState].FlushCache;<br />

SlpTyp = SleepType[NewState].SlpTyp & SLP_TYP_MASK;<br />

_asm {<br />

lea eax, OsResumeContext<br />

push eax ; Build real mode h<strong>and</strong>ler the resume<br />

push offset sp50 ; context, with eip = sp50<br />

call SaveProcessorState<br />

mov eax, ResumeVector ; set firmware’s resume vector<br />

mov [eax], offset OsRealModeResumeCode<br />

mov edx, PM1a_STS ; Make sure wake status is clear<br />

mov ax, WAK_STS ; (cleared by asserting the bit<br />

out dx, ax ; in the status register)<br />

mov edx, PM1b_STS ;<br />

out dx, ax ;<br />

<strong>and</strong> eax, not SLP_TYP_MASK<br />

or eax, SlpTyp ; set SLP_TYP<br />

or ax, SLP_EN ; set SLP_EN<br />

cmp FlushCaches, 0<br />

jz short sp10 ; If needed, ensure no dirty data in<br />

410 April, 2015 Version 6.0

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