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Advanced Configuration and Power Interface Specification

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<strong>Advanced</strong> <strong>Configuration</strong> <strong>and</strong> <strong>Power</strong> <strong>Interface</strong> <strong>Specification</strong><br />

Table 6-206 32-Bit Memory Range Descriptor Definition<br />

Offset Field Name Definition<br />

Byte 0 32-bit Memory Range Descriptor Value = 0x85 (10000101B) – Type = 1, Large item name =<br />

0x05<br />

Byte 1 Length, bits [7:0] Value = 0x11 (17)<br />

Byte 2 Length, bits [15:8] Value = 0x00<br />

Byte 3 Information This field provides extra information about this memory.<br />

Bit [7:1] Ignored<br />

Bit [0] Write status, _RW<br />

1 writeable (read/write)<br />

0 non-writeable (read-only)<br />

Byte 4 Range minimum base address,<br />

_MIN, bits [7:0]<br />

Address bits [7:0] of the minimum base memory address for<br />

which the card may be configured.<br />

Byte 5<br />

Byte 6<br />

Byte 7<br />

Byte 8<br />

Byte 9<br />

Byte<br />

10<br />

Byte<br />

11<br />

Byte<br />

12<br />

Byte<br />

13<br />

Byte<br />

14<br />

Byte<br />

15<br />

Byte<br />

16<br />

Byte<br />

17<br />

Range minimum base address,<br />

_MIN, bits [15:8]<br />

Range minimum base address,<br />

_MIN, bits [23:16]<br />

Range minimum base address,<br />

_MIN, bits [31:24]<br />

Range maximum base address,<br />

_MAX, bits [7:0]<br />

Range maximum base address,<br />

_MAX, bits [15:8]<br />

Range maximum base address,<br />

_MAX, bits [23:16]<br />

Range maximum base address,<br />

_MAX, bits [31:24]<br />

Base alignment, _ALN bits [7:0]<br />

Base alignment, _ALN bits [15:8]<br />

Base alignment, _ALN bits<br />

[23:16]<br />

Base alignment, _ALN bits<br />

[31:24]<br />

Range length, _LEN bits [7:0]<br />

Range length, _LEN bits [15:8]<br />

Address bits [15:8] of the minimum base memory address for<br />

which the card may be configured.<br />

Address bits [23:16] of the minimum base memory address for<br />

which the card may be configured.<br />

Address bits [31:24] of the minimum base memory address for<br />

which the card may be configured.<br />

Address bits [7:0] of the maximum base memory address for<br />

which the card may be configured.<br />

Address bits [15:8] of the maximum base memory address for<br />

which the card may be configured.<br />

Address bits [23:16] of the maximum base memory address<br />

for which the card may be configured.<br />

Address bits [31:24] of the maximum base memory address<br />

for which the card may be configured.<br />

This field contains bits [7:0] of the base alignment. The base<br />

alignment provides the increment for the minimum base<br />

address.<br />

This field contains bits [15:8] of the base alignment. The base<br />

alignment provides the increment for the minimum base<br />

address.<br />

This field contains bits [23:16] of the base alignment. The<br />

base alignment provides the increment for the minimum base<br />

address.<br />

This field contains bits [31:24] of the base alignment. The<br />

base alignment provides the increment for the minimum base<br />

address.<br />

This field contains bits [7:0] of the memory range length. The<br />

range length provides the length of the memory range in 1-<br />

byte blocks.<br />

This field contains bits [15:8] of the memory range length. The<br />

range length provides the length of the memory range in 1-<br />

byte blocks.<br />

352 April, 2015 Version 6.0

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