Advanced Configuration and Power Interface Specification

Advanced Configuration and Power Interface Specification
Arguments: (4)
Arg0 – UUID (Buffer): 0811B06E-4A27-44F9-8D60-3CBBC22E7B48
Arg1 – Revision ID (Integer): 1
Arg2 – Count of Entries in Arg3 (Integer): 2
Arg3 – DWORD capabilities (Buffer): First DWORD: as described in Section 6.2.11, Second
DWORD: See Table 6-176
Table 6-176 Platform-Wide _OSC Capabilities DWORD 2
Bits Field Name Definition
0 Processor Aggregator
Device Support
1 _PPC _OST Processing
Support
This bit is set if OSPM supports the Processor Aggregator device as
described in Section 8.5, “Processor Aggregator Device”
This bit is set if OSPM will evaluate the _OST object defined under a
processor as a result of _PPC change notification (Notify 0x80)
2 _PR3 Support This bit is set if OSPM supports reading _PR3and using power
resources to switch power. Note this handshake translates to an
operating model that the platform and OSPM supports both the power
model containing both D3hot and D3.
3 Insertion / Ejection _OST
Processing Support
This bit is set if OSPM will evaluate the _OST object defined under a
device when processing insertion and ejection source event codes.
4 APEI Support This bit is set if OSPM supports the ACPI Platform Error Interfaces.
See Section 18, “ACPI Platform Error Interfaces”.
5 CPPC Support This bit is set if OSPM supports controlling processor performance via
the interfaces described in the _CPC object.
6 CPPC 2 Support This bit is set if OSPM supports revision 2 of the _CPC object.
7 Platform Coordinated Low
Power Idle Support
8 OS Initiated Low Power
Idle Support
9 Fast Thermal Sampling
support
10 Greater Than 16 p-state
support
This bit is set if OSPM supports platform coordinated low power idle
states.*(see note, below)
This bit is set if OSPM supports OS initiated low power idle states.
*(see note, below)
This bit is set if OSPM supports _TFP.
31:11 Reserved (must be 0)
This bit is set if OSPM supports greater than 16 p-states. If clear, no
more than 16 p-states are supported.
Note: * As part of the handshake provided through _OSC the OS will pass in flags to indicate whether it
supports Platform Coordinated Low Power Idle or OS Initiated Low Power Idle or both (see “Idle
State Coordination”, Section 8.4.4.2), through flags 7 and 8. The platform will indicate which of the
modes it supports in its response by clearing flags that are not supported. If both are supported,
the default is platform coordinated and OSPM can switch the platform to OS Initiated via a
processor architecture specific mechanism. By setting either flag 7 or 8 or both, the OSPM is
asserting it supports any objects associated with Low Power Idle states (see LPI in
316 April, 2015 Version 6.0