Advanced Configuration and Power Interface Specification

Table 5-91 Power state Values .......................................................................................... 176
Table 5-92 Command Status ............................................................................................. 177
Table 5-93 Memory Power Node Structure definition ......................................................... 178
Table 5-94 Flag format........................................................................................................ 179
Table 5-95 Memory Power State Structure definition ......................................................... 180
Table 5-96 Memory Power State Characteristics Structure ............................................... 180
Table 5-97 Flag format of Memory Power State Characteristics Structure ........................ 181
Table 5-98 Platform Memory Topology Table..................................................................... 184
Table 5-99 Common Memory Aggregator Device Structure............................................... 184
Table 5-100 Socket Structure ............................................................................................ 185
Table 5-101 Memory Controller Structure........................................................................... 186
Table 5-102 Physical Components Identifier Structure ..................................................... 187
Table 5-103 Boot Graphics Resource Table Fields ............................................................ 188
Table 5-104 Status Description Field.................................................................................. 189
Table 5-105 Image Type Description Field ......................................................................... 189
Table 5-106 Firmware Performance Data Table (FPDT) Format ....................................... 190
Table 5-107 Performance Record Structure ...................................................................... 191
Table 5-108 Performance Record Types............................................................................ 191
Table 5-109 Runtime Performance Record Types ............................................................. 192
Table 5-110 S3 Performance Table Pointer Record .......................................................... 193
Table 5-111 S4 Performance Table Pointer Record .......................................................... 193
Table 5-112 S3 Performance Table Header ...................................................................... 194
Table 5-113 Basic S3 Resume Performance Record ........................................................ 194
Table 5-114 Basic S3 Suspend Performance Record ....................................................... 194
Table 5-115 Firmware Basic Boot Performance Table Header ......................................... 195
Table 5-116 Firmware Basic Boot Performance Data Record Structure ........................... 195
Table 5-117 GTDT Table Structure .................................................................................... 196
Table 5-118 Flag Definitions: Virtual Timer, EL2 timers, and Secure & Non-Secure EL1
timers ......................................................................................................................... 197
Table 5-119 Platform Timer Type Structures...................................................................... 198
Table 5-120 GT Block Structure Format ............................................................................. 198
Table 5-121 GT Block Timer Structure Format................................................................... 199
Table 5-122 Flag Definitions: GT Block Physical Timers and Virtual timers....................... 199
Table 5-123 Flag Definitions: Common Flags.................................................................... 200
Table 5-124 SBSA Generic Watchdog Structure Format ................................................... 200
Table 5-125 Flag Definitions: SBSA Generic Watchdog Timer .......................................... 201
Table 5-126 NVDIMM Firmware Interface Table ................................................................ 202
Table 5-127 NFIT Structure Types .................................................................................... 203
Table 5-128 System Physical Address Range Structure .................................................... 204
Table 5-129 Memory Device to System Physical Address Range Mapping Structure ...... 205
Table 5-130 Interleave Settings Interpretation.................................................................... 207
Table 5-131 Interleave StructureI ....................................................................................... 208
Table 5-132 SMBIOS Management Information Structure ................................................. 208
Table 5-133 NVDIMM Control Region Structure ............................................................... 209
Table 5-134 NVDIMM Block Data Windows Region Structure ........................................... 211
Table 5-135 Flush Hint Address Structure......................................................................... 212
Table 5-136 Namespaces Defined Under the Namespace Root........................................ 214
Version 6.0
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