Advanced Configuration and Power Interface Specification

Tables
Table 1-1 Hardware Type vs. OS Type Interaction................................................................. 3
Table 2-2 Summary of Global Power States......................................................................... 25
Table 2-3 Summary of Device Power States ........................................................................ 27
Table 3-4 Low Battery Levels ............................................................................................... 49
Table 3-5 Implementable Platform Types ............................................................................. 54
Table 4-6 Feature/Programming Model Summary................................................................ 68
Table 4-7 PM1 Event Registers ............................................................................................ 72
Table 4-8 PM1 Control Registers.......................................................................................... 72
Table 4-9 PM2 Control Register ........................................................................................... 73
Table 4-10 PM Timer Register.............................................................................................. 73
Table 4-11 Processor Control Registers............................................................................... 73
Table 4-12 General-Purpose Event Registers ...................................................................... 73
Table 4-13 Power Button Support......................................................................................... 76
Table 4-14 Sleep Button Support.......................................................................................... 79
Table 4-15 Alarm Field Decodings within the FADT ............................................................. 83
Table 4-16 PM1 Status Registers Fixed Hardware Feature Status Bits ............................... 86
Table 4-17 PM1 Enable Registers Fixed Hardware Feature Enable Bits ............................. 88
Table 4-18 PM1 Control Registers Fixed Hardware Feature Control Bits ............................ 89
Table 4-19 PM Timer Bits ..................................................................................................... 90
Table 4-20 PM2 Control Register Bits ................................................................................. 90
Table 4-21 Processor Control Register Bits.......................................................................... 91
Table 4-22 Processor LVL2 Register Bits............................................................................. 91
Table 4-23 Processor LVL3 Register Bits............................................................................. 92
Table 4-24 Sleep Control Register ....................................................................................... 93
Table 4-25 Sleep Status Register ........................................................................................ 93
Table 5-26 Generic Address Structure (GAS) .................................................................... 107
Table 5-27 Address Space Format ..................................................................................... 108
Table 5-28 Root System Description Pointer Structure ...................................................... 110
Table 5-29 DESCRIPTION_HEADER Fields...................................................................... 110
Table 5-30 DESCRIPTION_HEADER Signatures for tables defined by ACPI ................... 111
Table 5-31 DESCRIPTION_HEADER Signatures for tables reserved by ACPI ................. 112
Table 5-32 Root System Description Table Fields (RSDT) ................................................ 115
Table 5-33 Extended System Description Table Fields (XSDT) ......................................... 115
Table 5-34 Fixed ACPI Description Table (FADT) Format ................................................ 116
Table 5-35 Fixed ACPI Description Table Fixed Feature Flags.......................................... 124
Table 5-36 Fixed ACPI Description Table Boot IA-PC Boot Architecture Flags ................. 129
Table 5-37 Fixed ACPI Description Table ARM Boot Architecture Flags ........................... 129
Table 5-38 Firmware ACPI Control Structure (FACS) ........................................................ 130
Table 5-39 Firmware Control Structure Feature Flags ....................................................... 133
Table 5-40 OSPM Enabled Firmware Control Structure Feature Flags.............................. 133
Table 5-41 Global Lock Structure within the FACS ............................................................ 134
Table 5-42 Differentiated System Description Table Fields (DSDT)................................... 136
Table 5-43 Secondary System Description Table Fields (SSDT) ....................................... 137
Version 6.0
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