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Advanced Configuration and Power Interface Specification

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ACPI Software Programming Model<br />

Software should construct the device address space (accounting for interleave) before applying<br />

the block control start offset.<br />

5.2.25.6 NVDIMM Block Data Window Region Structure<br />

This structure shall be provided only if the number of Block Data Windows is non-zero.<br />

Table 5-134 NVDIMM Block Data Windows Region Structure<br />

Field<br />

Byte<br />

Length<br />

Byte<br />

Offset<br />

Description<br />

Type 2 0 5 - NVDIMM Block Data Window Region<br />

Structure<br />

Length 2 2 Length in bytes for entire structure.<br />

NVDIMM Control Region<br />

Structure Index<br />

Number of Block Data<br />

Windows<br />

Block Data Window Start<br />

Offset<br />

2 4 Provides association for the corresponding<br />

NVDIMM Control Region. Shall be Non-zero.<br />

2 6 Number of Block Data Windows shall match the<br />

corresponding number of Block Control<br />

Windows.<br />

8 8 In Bytes.<br />

Logical offset. Refer to Note2. The start of the<br />

subsequent Block Data Window is calculated by<br />

adding Size of Block Data Window.<br />

Size of Block Data Window 8 16 In Bytes<br />

Block Accessible Memory<br />

Capacity<br />

Beginning address of first<br />

block in Block Accessible<br />

Memory<br />

8 24 In Bytes<br />

8 32 In Bytes. The address of the next block is<br />

obtained by adding the value of this field to Size<br />

of Block Data Window.<br />

Note: Logical offset in table above refers to offset from the start of NVDIMM Data Window Region. The<br />

logical offset is with respect to the device not with respect to system physical address space.<br />

Software should construct the device address space (accounting for interleave) before applying<br />

the Block Data Window start offset.<br />

5.2.25.7 Flush Hint Address Structure<br />

Software needs an assurance of durability (i.e. a guarantee that the writes have reached the target<br />

NVDIMM) after writing to a NVDIMM region. Flush Hint feature is platform specific <strong>and</strong> if<br />

supported, the platform exposes this durability mechanism to OSPM by providing a Flush Hint<br />

Address Structure.<br />

For a given NVDIMM (as indicated by the NFIT Device H<strong>and</strong>le in the Flush Hint Address<br />

structure), software can write to any one of these Flush Hint Addresses to cause any preceding writes<br />

Version 6.0 211

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