Advanced Configuration and Power Interface Specification

Advanced Configuration and Power Interface Specification
Field
NFIT Device Handle 4 4 Uniquely identifies a Memory Device in this structure. The
handle is constructed as follows:
Bits [3:0] DIMM number within the memory channel
Bits [7:4] memory channel number
Bits [11:8] memory controller ID
Bits [15:12] socket ID (within scope of a Node controller if
node controller is present)
Bits [27:16] Node Controller ID
Bits [31:28] Reserved
Memory Device Physical
ID
2 8 SMBIOS Type 17 handle corresponding to this Memory
Device. This ID uniquely identifies a Memory Device in
the platform. Refer to http://www.dmtf.org/standards/
smbios for details of SMBIOS.
Memory Device Region ID 2 10 Unique ID to refer to regions within a Memory Device.
There could be multiple regions within the device
corresponding to different address types. Also, for a given
address type, there could be multiple regions due to
interleave discontinuity.
SPA Range Structure
Index
NVDIMM Control Region
Structure Index
Memory Device Region
Size
2 12 Refers to corresponding SPA Range Structure entry.
Index value of 0 indicates that the device is not described
in system physical address space and that the fields from
“Memory Device Region Size“ through “InterleaveWays”
in this structure are not valid and must not be interpreted.
2 14 Refers to the NVDIMM Control Region that should be
used for the range described by this structure. This field
must contain a non-zero value referring to a NVDIMM
Control Region Structure.
8 16 Size in bytes. This field provides the size occupied in the
NVDIMM for the corresponding SPA range pointed by
SPA Range Structure Index.
If SPA Range Structure Index and InterleaveWay are
both non-zero, this field shall match System Physical
Address Range Length divided by InterleaveWays.
NOTE: the size in SPA Range occupied by this NVDIMM
for this region will not be the same as the Memory Device
Region Size when InterleaveWays is greater than 1.
Region Offset 8 24 In bytes.
This field provides Starting Offset for Region in Interleave
Set. This offset is with respect to System Physical
Address Range Base in SPA Range Structure.
NOTE: The starting SPA of the Region in this Memory
Device is provided by System Physical Address Range
Base + Region Offset
Memory Device Physical
Address Region Base
Byte
Length
Byte
Offset
Description
8 32 In bytes. This field provides the Device Physical Address
base of the region.
206 April, 2015 Version 6.0