Advanced Configuration and Power Interface Specification

ACPI Software Programming Model
Field
Byte
Length
Byte
Offset
Description
MPIDR 8 68 This fields follows the MPIDR formatting of ARM architecture.
If the implements ARMv7 architecure then the format must be:
Bits [63:24] Must be zero
Bits [23:16] Aff2 : Match Aff2 of target processor MPIDR
Bits [15:8] Aff1 : Match Aff1 of target processor MPIDR
Bits [7:0] Aff0 : Match Aff0 of target processor MPIDR
Processor Power
Efficiency Class
For platforms implementing ARMv8 the format must be:
Bits [63:40] Must be zero
Bits [39:32] Aff3 : Match Aff3 of target processor MPIDR
Bits [31:24] Must be zero
Bits [23:16] Aff2 : Match Aff2 of target processor MPIDR
Bits [15:8] Aff1 : Match Aff1 of target processor MPIDR
Bits [7:0] Aff0 : Match Aff0 of target processor MPIDR
1 76 Describes the relative power efficiency of the associated
processor. Lower efficiency class numbers are more efficient than
higher ones (e.g. efficiency class 0 should be treated as more
efficient than efficiency class 1).
However, absolute values of this number have no meaning: 2 isn't
necessarily half as efficient as 1.
Reserved 3 77 Must be zero.
Table 5-62 GICC CPU Interface Flags
GIC Flags
Bit
Length
Bit
Offset
Description
Enabled 1 0 If zero, this processor is unusable, and the operating system
support will not attempt to use it.
Performance
Interrupt Mode
VGIC
Maintenance
interrupt Mode
Flags
1 1 0 - Level-triggered
1 - Edge-Triggered
1 2 0 - Level-triggered
1 - Edge-Triggered
Reserved 29 3 Must be zero.
Note: GICC descriptor structures are listed immediately after the Flags field in the MADT, one descriptor
for each GICC, followed by one for each GICC Distributor. The Local GICC corresponding to the
boot processor must be the first entry in the Interrupt Controller Structure list.
5.2.12.15 GIC Distributor Structure
ACPI represents all interrupts as “flat” values known as global system interrupts (GSIVs)
(Section 5.2.13). On ARM, the GIC Distributor has some number of interrupt inputs corresponding
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