Advanced Configuration and Power Interface Specification

Advanced Configuration and Power Interface Specification
5.2.12.1 MADT Processor Local APIC / SAPIC Structure Entry Order
OSPM implementations may limit the number of supported processors on multi-processor
platforms. OSPM executes on the boot processor to initialize the platform including other
processors. To ensure that the boot processor is supported post initialization, two guidelines should
be followed. The first is that OSPM should initialize processors in the order that they appear in the
MADT. The second is that platform firmware should list the boot processor as the first processor
entry in the MADT.
The advent of multi-threaded processors yielded multiple logical processors executing on common
processor hardware. ACPI defines logical processors in an identical manner as physical processors.
To ensure that non multi-threading aware OSPM implementations realize optimal performance on
platforms containing multi-threaded processors, two guidelines should be followed. The first is the
same as above, that is, OSPM should initialize processors in the order that they appear in the
MADT. The second is that platform firmware should list the first logical processor of each of the
individual multi-threaded processors in the MADT before listing any of the second logical
processors. This approach should be used for all successive logical processors.
Failure of OSPM implementations and platform firmware to abide by these guidelines can result in
both unpredictable and non optimal platform operation.
5.2.12.2 Processor Local APIC Structure
When using the APIC interrupt model, each processor in the system is required to have a Processor
Local APIC record in the MADT, and a processor device object in the DSDT. OSPM does not
expect the information provided in this table to be updated if the processor information changes
during the lifespan of an OS boot. While in the sleeping state, processors are not allowed to be
added, removed, nor can their APIC ID or Flags change. When a processor is not present, the
Processor Local APIC information is either not reported or flagged as disabled.
Table 5-47 Processor Local APIC Structure
Field
Byte
Length
Byte
Offset
Description
Type 1 0 0 Processor Local APIC structure
Length 1 1 8
ACPI
Processor UID
1 2 The OS associates this Local APIC Structure with a processor object
in the namespace when the _UID child object of the processor's
device object (or the ProcessorId listed in the Processor declaration
operator) evaluates to a numeric value that matches the numeric
value in this field. Note that the use of the Processor declaration
operator is deprecated. See the compatibility note in Section 5.2.12.2
and see Section 19.6.102, “Processor (Declare Processor).”
APIC ID 1 3 The processor’s local APIC ID.
Flags 4 4 Local APIC flags. See Table 5-47 for a description of this field.
Table 5-48 Local APIC Flags
LocalAPIC Flags
Bit
Length
Bit
Offset
Description
140 April, 2015 Version 6.0