Advanced Configuration and Power Interface Specification

Advanced Configuration and Power Interface Specification
5.2.12 Multiple APIC Description Table (MADT)
The ACPI interrupt model describes all interrupts for the entire system in a uniform interrupt model
implementation. Supported interrupt models include the PC-AT-compatible dual 8259 interrupt
controller, for Intel processor-based systems, the Intel Advanced Programmable Interrupt Controller
(APIC) and Intel Streamlined Advanced Programmable Interrupt Controller (SAPIC), and, for ARM
processor-based systems, the Generic Interrupt Controller (GIC). The choice of the interrupt
model(s) to support is up to the platform designer. The interrupt model cannot be dynamically
changed by the system firmware; OSPM will choose which model to use and install support for that
model at the time of installation. If a platform supports multiple models, an OS will install support
for only one of the models; it will not mix models. Multi-boot capability is a feature in many modern
operating systems. This means that a system may have multiple operating systems or multiple
instances of an OS installed at any one time. Platform designers must allow for this.
This section describes the format of the Multiple APIC Description Table (MADT), which provides
OSPM with information necessary for operation on systems with APIC, SAPIC or GIC
implementations.
ACPI represents all interrupts as "flat" values known as global system interrupts. Therefore to
support APICs, SAPICs or GICs on an ACPI-enabled system, each used interrupt input must be
mapped to the global system interrupt value used by ACPI. See Section 5.2.13. Global System
Interrupts,” for a description of Global System Interrupts.
Additional support is required to handle various multi-processor functions that implementations
might support (for example, identifying each processor's local interrupt controller ID).
All addresses in the MADT are processor-relative physical addresses.
Table 5-44 Multiple APIC Description Table (MADT) Format
Field
Byte
Length
Byte
Offset
Description
Header
Signature 4 0 ‘APIC’ Signature for the Multiple APIC Description Table.
Length 4 4 Length, in bytes, of the entire MADT.
Revision 1 8 3
Checksum 1 9 Entire table must sum to zero.
OEMID 6 10 OEM ID
OEM Table ID 8 16 For the MADT, the table ID is the manufacturer model ID.
OEM Revision 4 24 OEM revision of MADT for supplied OEM Table ID.
Creator ID 4 28 Vendor ID of utility that created the table. For tables containing
Definition Blocks, this is the ID for the ASL Compiler.
Creator Revision 4 32 Revision of utility that created the table. For tables containing
Definition Blocks, this is the revision for the ASL Compiler.
Local Interrupt
Controller Address
4 36 The 32-bit physical address at which each processor can access
its local interrupt controller.
Flags 4 40 Multiple APIC flags. See Table 5-45 for a description of this field.
138 April, 2015 Version 6.0