Advanced Configuration and Power Interface Specification

Advanced Configuration and Power Interface Specification
Field
Byte
Length
Byte
Offset
Description
RESET_VALUE 1 128 Indicates the value to write to the RESET_REG port to reset
the system. (See Section 4.8.3.6, “Reset Register,” for a
description of the reset mechanism.)
ARM_BOOT_ARCH 2 129 ARM Boot Architecture Flags. See Table 5-37 for a
description of this field.
FADT Minor Version 1 131 0
Minor Version of this FADT structure, in "Major.Minor" form,
where 'Major' is the value in the Major Version Field (Byte
offset 8 in this table).
X_FIRMWARE_CTRL 8 132 64bit physical address of the FACS. This field is used when
the physical address of the FACS is above 4GB. If the
FIRMWARE_CTRL field contains a non zero value then this
field must be zero. If the HARDWARE_REDUCED_ACPI flag
is set, and the FIRMWARE_CTRL field is zero, this field may
also be zero. A zero value indicates that no FACS is
specified by this field. If both this field and the
FIRMWARE_CTRL field are zero, there is no FACS available.
X_DSDT 8 140 64bit physical address of the DSDT.
X_PM1a_EVT_BLK 12 148 Extended address of the PM1a Event Register Block,
represented in Generic Address Structure format. See
Section 4.8.3.1, “PM1 Event Grouping,” for a hardware
description layout of this register block. This is a required
field.
X_PM1b_EVT_BLK 12 160 Extended address of the PM1b Event Register Block,
represented in Generic Address Structure format. See
Section 4.8.3.1, “PM1 Event Grouping,” for a hardware
description layout of this register block. This field is optional; if
this register block is not supported, this field contains zero.
X_PM1a_CNT_BLK 12 172 Extended address of the PM1a Control Register Block,
represented in Generic Address Structure format. See
Section 4.8.3.2, “PM1 Control Grouping,” for a hardware
description layout of this register block. This is a required
field.
X_PM1b_CNT_BLK 12 184 Extended address of the PM1b Control Register Block,
represented in Generic Address Structure format. See
Section 4.8.3.2, “PM1 Control Grouping,” for a hardware
description layout of this register block. This field is optional; if
this register block is not supported, this field contains zero.
X_PM2_CNT_BLK 12 196 Extended address of the Power Management 2 Control
Register Block, represented in Generic Address Structure
format. See Section 4.8.3.4 “PM2 Control (PM2_CNT),” for a
hardware description layout of this register block. This field is
optional; if this register block is not supported, this field
contains zero.
122 April, 2015 Version 6.0