Advanced Configuration and Power Interface Specification

ACPI Hardware Specification
This logic will set the Lid status bit when the button is pressed or released (depending on the
LID_POL bit).
The ASL code below defines the following:
• An operational region where the lid polarity resides in address space System address space in
registers 0x201.
• A field operator to allow AML code to access this bit: Polarity control bit (LID_POL) is called
LPOL and is accessed at 0x201.0.
• A device named \_SB.LID with the following:
— A Plug and Play identifier “PNP0C0D” that associates OSPM with this object.
— Defines an object that specifies a change in the lid’s status bit can wake the system from the
S4 sleep state and from all higher sleep states (S1, S2, or S3).
• The lid switch event handler that does the following:
— Defines the lid status bit (LID_STS) as a child of the general-purpose event 0 register bit 1.
— Defines the event handler for the lid (only event handler on this status bit) that does the
following:
• Flips the polarity of the LPOL bit (to cause the event to be generated on the opposite
condition).
• Generates a notify to the OS that does the following:
• Passes the \_SB.LID object.
• Indicates a device specific event (notify value 0x80).
// Define a Lid switch
OperationRegion(\PHO, SystemIO, 0x201, 0x1)
Field(\PHO, ByteAcc, NoLock, Preserve) {
LPOL, 1
// Lid polarity control bit
}
Device(\_SB.LID){
Name(_HID, EISAID(“PNP0C0D”))
Method(_LID){Return(LPOL)}
Name(_PRW, Package(2){
1, // bit 1 of GPE to enable Lid wakeup
0x04} // can wakeup from S4 state
)
}
Scope(\_GPE){
// Root level event handlers
Method(_L01){
// uses bit 1 of GP0_STS register
Not(LPOL, LPOL) // Flip the lid polarity bit
Notify(LID, 0x80) // Notify OS of event
}
}
4.8.4.2.2 Embedded Controller
ACPI provides a standard interface that enables AML code to define and access generic logic in
“embedded controller space.” This supports current computer models where much of the value
added hardware is contained within the embedded controller while allowing the AML code to access
this hardware in an abstracted fashion.
• The embedded controller is defined as a device and must contain a set number of control
methods:
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