Advanced Configuration and Power Interface Specification

Advanced Configuration and Power Interface Specification
Different implementations will result in different address spaces being used for different functions.
The ACPI specification consists of fixed hardware registers and generic hardware registers. Fixed
hardware registers are required to implement ACPI-defined interfaces. The generic hardware
registers are needed for any events generated by value-added hardware.
ACPI defines register blocks. An ACPI-compatible system provides an ACPI table (the FADT, built
in memory at boot-up) that contains a list of pointers to the different fixed hardware register blocks
used by OSPM. The bits within these registers have attributes defined for the given register block.
The types of registers that ACPI defines are:
• Status/Enable Registers (for events)
• Control Registers
If a register block is of the status/enable type, then it will contain a register with status bits, and a
corresponding register with enable bits. The status and enable bits have an exact implementation
definition that needs to be followed (unless otherwise noted), which is illustrated by the following
diagram:
Event Input
Status Bit
Event Output
Enable Bit
Figure 4-12 Block Diagram of a Status/Enable Cell
Notice that the status bit, which hardware sets by the Event Input being set in this example, can only
be cleared by software writing a 1 to its bit position. Also, the enable bit has no effect on the setting
or resetting of the status bit; it only determines if the SET status bit will generate an “Event Output,”
which generates an SCI when set if its enable bit is set.
ACPI also defines register groupings. A register grouping consists of two register blocks, with two
pointers to two different blocks of registers, where each bit location within a register grouping is
fixed and cannot be changed. The bits within a register grouping, which have fixed bit positions, can
be split between the two register blocks. This allows the bits within a register grouping to reside in
either or both register blocks, facilitating the ability to map bits within several different chips to the
same register thus providing the programming model with a single register grouping bit structure.
OSPM treats a register grouping as a single register; but located in multiple places. To read a register
grouping, OSPM will read the “A” register block, followed by the “B” register block, and then will
logically “OR” the two results together (the SLP_TYP field is an exception to this rule). Reserved
bits, or unused bits within a register block always return zero for reads and have no side effects for
writes (which is a requirement).
The SLP_TYPx field can be different for each register grouping. The respective sleeping object \_Sx
contains a SLP_TYPa and a SLP_TYPb field. That is, the object returns a package with two integer
values of 0-7 in it. OSPM will always write the SLP_TYPa value to the “A” register block followed
by the SLP_TYPb value within the field to the “B” register block. All other bit locations will be
written with the same value. Also, OSPM does not read the SLP_TYPx value but throws it away.
70 April, 2015 Version 6.0