Digital Systems Laboratory - Eskişehir Osmangazi Üniversitesi

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Other CountsR1 and R2 are the reset inputs of the IC type 7493. By connecting one or two outputs to the reset inputsR1 and R2, the counter can count from 0 to a variety of final count. In Figure 2, if R1 is connected to QAinstead of QB, the resulting count will be from 0000 to 1000, which is the one less than 1001 (QD=1 andQA=1).Count Binary0 00001 00012 0010….….7 01118 10009 0 10010000 Resets the counter (R1=QA, R2=QD)1 00012 0010Utilizing your knowledge of how R1 and R2 affect the final count, find out which outputs should beconnected to the resets inputs to count 0000 to the following counts:a. 0101b. 0111c. 10111. Turn of the power switch.2. Connect the 7493 IC to count from 0 to one of the final counts given above.3. Verify the count by applying pulses from the pushbuttons and observing the output count in the logicindicators/LEDs.8
Digital Systems Laboratory 2011Lab 2 : Digital Logic GatesObjectives• To study the basic logic gates: AND, OR, INVERT, NAND, and NOR.• To study the representation of these functions by truth tables, logic diagrams and Booleanalgebra.• To observe the pulse response of logic gates.• To measure the propagation delay of logic gates.Apparatus7400 Quadruple 2-input NAND gates7402 Quadruple 2-input NOR gates7404 Hex Inverters (x2)7408 Quadruple 2-input AND gates7432 Quadruple 2-input OR gates7486 Quadruple 2-input XOR gateCADET trainerDual-trace oscilloscopeTheoryANDORINVERTNANDA multi-input circuit in which the output is 1 only if all inputs are 1.The symbolicrepresentation of the AND gate is shown in Fig. 3a.A multi-input circuit in which the output is 1 when any input is 1. The symbolicrepresentation of the OR gate is shown in Fig. 3b.The output is 0 when the input is 1, and the output is 1 when the input is 0. The symbolicrepresentation of an inverter is shown in Fig. 3c.AND followed by INVERT. The symbolic representation of the NAND gate is shown in Fig3d.NOR OR followed by INVERT as shown in Fig. 3e.EX-ORTruth TableThe output of the Exclusive –OR gate, is 0 when it’s two inputs are the same and it’soutput is 1 when its two inputs are different, Fig. 3f.Representation of the output logic levels of a logic circuit for every possible combinationof levels of the inputs. This is best done by means of a systematic tabulation.a. Two input AND gate b. Two input OR gate c. Inverter9
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Digital Systems Laboratory 2011Lab
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Digital Systems Laboratory - Eskişehir Osmangazi Üniversitesi

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